commit d9573cde950ce408795b7f95a561834176bc3f7d
Author: Andrey Proskurnev <andrey@proskurnev.ru>
Date:   Sun Jul 2 19:57:41 2017 +0300

    initial commit

diff --git a/custom.pretty/1pin.kicad_mod b/custom.pretty/1pin.kicad_mod
new file mode 100644
index 0000000..0f62e1e
--- /dev/null
+++ b/custom.pretty/1pin.kicad_mod
@@ -0,0 +1,9 @@
+(module 1pin (layer F.Cu) (tedit 5958F8D5)
+  (fp_text reference REF** (at 0.254 -1.778) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value 1pin (at 0 1.524) (layer F.Fab) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
+)
diff --git a/custom.pretty/CP_Radial_D5.0mm_P2.50mm.kicad_mod b/custom.pretty/CP_Radial_D5.0mm_P2.50mm.kicad_mod
new file mode 100644
index 0000000..48ccf2c
--- /dev/null
+++ b/custom.pretty/CP_Radial_D5.0mm_P2.50mm.kicad_mod
@@ -0,0 +1,26 @@
+(module CP_Radial_D5.0mm_P2.50mm (layer F.Cu) (tedit 595003AF)
+  (descr "CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor")
+  (tags "CP Radial series Radial pin pitch 2.50mm  diameter 5mm Electrolytic Capacitor")
+  (fp_text reference C1 (at 1.778 -2.54) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value 0.01mjuF (at 2.032 4.826) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_circle (center 1.778 0) (end 5.842 -0.254) (layer F.SilkS) (width 0.15))
+  (fp_text user %R (at 1.778 -2.54) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -3.724 0) (end -2.524 0) (layer F.Fab) (width 0.1))
+  (fp_line (start -3.124 -0.65) (end -3.124 0.65) (layer F.Fab) (width 0.1))
+  (fp_line (start -3.724 0) (end -2.524 0) (layer F.SilkS) (width 0.12))
+  (fp_line (start -3.124 -0.65) (end -3.124 0.65) (layer F.SilkS) (width 0.12))
+  (fp_circle (center 1.758 0) (end 5.746 0) (layer F.Fab) (width 0.1))
+  (pad 1 thru_hole rect (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 3.556 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+  (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_D5.0mm_P2.50mm.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/custom.pretty/INDUCTOR_V.kicad_mod b/custom.pretty/INDUCTOR_V.kicad_mod
new file mode 100644
index 0000000..aa10d4b
--- /dev/null
+++ b/custom.pretty/INDUCTOR_V.kicad_mod
@@ -0,0 +1,18 @@
+(module INDUCTOR_V (layer F.Cu) (tedit 595000CB)
+  (descr "Inductor (vertical)")
+  (tags INDUCTOR)
+  (fp_text reference L1 (at 0 1.99898) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value 220mjuH (at 0.09906 -1.99898) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_circle (center 0 0) (end 3.81 0) (layer F.SilkS) (width 0.15))
+  (pad 1 thru_hole rect (at -2.54 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 2.54 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+  (model Inductors.3dshapes/INDUCTOR_V.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 2 2 2))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/custom.pretty/Resistor_L9.0mm_D3.2mm_P12.70mm.kicad_mod b/custom.pretty/Resistor_L9.0mm_D3.2mm_P12.70mm.kicad_mod
new file mode 100644
index 0000000..463fbe4
--- /dev/null
+++ b/custom.pretty/Resistor_L9.0mm_D3.2mm_P12.70mm.kicad_mod
@@ -0,0 +1,33 @@
+(module Resistor_L9.0mm_D3.2mm_P12.70mm (layer F.Cu) (tedit 594FFE53)
+  (descr "Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=12.7mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
+  (tags "Resistor Axial_DIN0309 series Axial Horizontal pin pitch 12.7mm 0.5W = 1/2W length 9mm diameter 3.2mm")
+  (fp_text reference REF** (at 6.35 0) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value resistor (at 6.35 2.66) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start 1.85 -1.6) (end 1.85 1.6) (layer F.Fab) (width 0.1))
+  (fp_line (start 1.85 1.6) (end 10.85 1.6) (layer F.Fab) (width 0.1))
+  (fp_line (start 10.85 1.6) (end 10.85 -1.6) (layer F.Fab) (width 0.1))
+  (fp_line (start 10.85 -1.6) (end 1.85 -1.6) (layer F.Fab) (width 0.1))
+  (fp_line (start 0 0) (end 1.85 0) (layer F.Fab) (width 0.1))
+  (fp_line (start 12.7 0) (end 10.85 0) (layer F.Fab) (width 0.1))
+  (fp_line (start 1.79 -1.66) (end 1.79 1.66) (layer F.SilkS) (width 0.12))
+  (fp_line (start 1.79 1.66) (end 10.91 1.66) (layer F.SilkS) (width 0.12))
+  (fp_line (start 10.91 1.66) (end 10.91 -1.66) (layer F.SilkS) (width 0.12))
+  (fp_line (start 10.91 -1.66) (end 1.79 -1.66) (layer F.SilkS) (width 0.12))
+  (fp_line (start 0.98 0) (end 1.79 0) (layer F.SilkS) (width 0.12))
+  (fp_line (start 11.72 0) (end 10.91 0) (layer F.SilkS) (width 0.12))
+  (fp_line (start -1.05 -1.95) (end -1.05 1.95) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -1.05 1.95) (end 13.75 1.95) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 13.75 1.95) (end 13.75 -1.95) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 13.75 -1.95) (end -1.05 -1.95) (layer F.CrtYd) (width 0.05))
+  (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 12.7 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+  (model Resistors_THT.3dshapes/R_Axial_DIN0309_L9.0mm_D3.2mm_P12.70mm_Horizontal.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.393701 0.393701 0.393701))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/custom.pretty/Wire_Pad_1pin.kicad_mod b/custom.pretty/Wire_Pad_1pin.kicad_mod
new file mode 100644
index 0000000..3593153
--- /dev/null
+++ b/custom.pretty/Wire_Pad_1pin.kicad_mod
@@ -0,0 +1,9 @@
+(module Wire_Pad_1pin (layer F.Cu) (tedit 594FFEB6)
+  (fp_text reference REF** (at 0 -2.54) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value 1pin (at 0 2.54) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+)
diff --git a/custom.pretty/align_hole.kicad_mod b/custom.pretty/align_hole.kicad_mod
new file mode 100644
index 0000000..03dd352
--- /dev/null
+++ b/custom.pretty/align_hole.kicad_mod
@@ -0,0 +1,14 @@
+(module align_hole (layer F.Cu) (tedit 59569E5C)
+  (descr "module 1 pin (ou trou mecanique de percage)")
+  (tags DEV)
+  (zone_connect 0)
+  (fp_text reference REF** (at 0 -3.048) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value "" (at 0 3) (layer F.Fab) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
+  (pad "" np_thru_hole circle (at 0 0) (size 1 1) (drill 0.5) (layers *.Cu *.Mask)
+    (zone_connect 0))
+)
diff --git a/custom.pretty/resistor.kicad_mod b/custom.pretty/resistor.kicad_mod
new file mode 100644
index 0000000..a534f02
--- /dev/null
+++ b/custom.pretty/resistor.kicad_mod
@@ -0,0 +1,14 @@
+(module resistor (layer F.Cu) (tedit 594FF9DE)
+  (fp_text reference REF** (at 0 0.5) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value resistor (at 0 -2.54) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -6.35 -1.27) (end 6.35 -1.27) (layer F.SilkS) (width 0.15))
+  (fp_line (start 6.35 -1.27) (end 6.35 1.27) (layer F.SilkS) (width 0.15))
+  (fp_line (start 6.35 1.27) (end -6.35 1.27) (layer F.SilkS) (width 0.15))
+  (fp_line (start -6.35 1.27) (end -6.35 -1.27) (layer F.SilkS) (width 0.15))
+  (pad 2 thru_hole circle (at 6.35 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+  (pad 1 thru_hole circle (at -6.35 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+)
diff --git a/freerouting/.gitignore b/freerouting/.gitignore
new file mode 100644
index 0000000..54f46fc
--- /dev/null
+++ b/freerouting/.gitignore
@@ -0,0 +1,2 @@
+build
+out
\ No newline at end of file
diff --git a/freerouting/FreeRouting.jar b/freerouting/FreeRouting.jar
new file mode 100644
index 0000000..12f222e
Binary files /dev/null and b/freerouting/FreeRouting.jar differ
diff --git a/freerouting/javaws.jar b/freerouting/javaws.jar
new file mode 100644
index 0000000..91367df
Binary files /dev/null and b/freerouting/javaws.jar differ
diff --git a/freerouting/jh.jar b/freerouting/jh.jar
new file mode 100644
index 0000000..185d942
Binary files /dev/null and b/freerouting/jh.jar differ
diff --git a/lib/custom.dcm b/lib/custom.dcm
new file mode 100644
index 0000000..5f3ed79
--- /dev/null
+++ b/lib/custom.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library
diff --git a/lib/custom.lib b/lib/custom.lib
new file mode 100644
index 0000000..722e44a
--- /dev/null
+++ b/lib/custom.lib
@@ -0,0 +1,16 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# DIP1
+#
+DEF DIP1 D 0 40 Y Y 1 F N
+F0 "D" 100 -50 60 H V C CNN
+F1 "DIP1" 100 100 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+X ~ 1 0 0 200 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/lm5017/lm5017-cache.lib b/lm5017/lm5017-cache.lib
new file mode 100644
index 0000000..b4c8979
--- /dev/null
+++ b/lm5017/lm5017-cache.lib
@@ -0,0 +1,36 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# DIP1
+#
+DEF DIP1 D 0 40 Y Y 1 F N
+F0 "D" 100 -50 60 H V C CNN
+F1 "DIP1" 100 100 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+X ~ 1 0 0 200 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# LM5017MR
+#
+DEF LM5017MR U 0 40 Y Y 1 F N
+F0 "U" -300 550 50 H V L CNN
+F1 "LM5017MR" -300 450 50 H V L CNN
+F2 "PSOP-8" 0 -450 50 H I C CIN
+F3 "" 0 0 50 H I C CNN
+DRAW
+S -300 400 300 -400 0 1 10 f
+X RTN 1 -400 -300 100 R 50 50 1 1 W
+X VIN 2 -400 300 100 R 50 50 1 1 I
+X ULVO 3 -400 -100 100 R 50 50 1 1 I
+X RON 4 -400 100 100 R 50 50 1 1 I
+X FB 5 400 -300 100 L 50 50 1 1 I
+X VCC 6 400 -100 100 L 50 50 1 1 O
+X BST 7 400 300 100 L 50 50 1 1 I
+X SW 8 400 100 100 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/lm5017/lm5017.bak b/lm5017/lm5017.bak
new file mode 100644
index 0000000..177a6a4
--- /dev/null
+++ b/lm5017/lm5017.bak
@@ -0,0 +1,146 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:dc-dc
+LIBS:custom
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L LM5017MR U1
+U 1 1 5958F6D2
+P 5050 2900
+F 0 "U1" H 4750 3450 50  0000 L CNN
+F 1 "LM5017MR" H 4750 3350 50  0000 L CNN
+F 2 "PSOP-8" H 5050 2450 50  0001 C CIN
+F 3 "" H 5050 2900 50  0001 C CNN
+	1    5050 2900
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D5
+U 1 1 5958F7BA
+P 5450 2600
+F 0 "D5" H 5550 2550 60  0000 C CNN
+F 1 "DIP1" H 5550 2700 60  0000 C CNN
+F 2 "" H 5450 2600 60  0001 C CNN
+F 3 "" H 5450 2600 60  0001 C CNN
+	1    5450 2600
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D6
+U 1 1 5958F879
+P 5450 2800
+F 0 "D6" H 5550 2750 60  0000 C CNN
+F 1 "DIP1" H 5550 2900 60  0000 C CNN
+F 2 "" H 5450 2800 60  0001 C CNN
+F 3 "" H 5450 2800 60  0001 C CNN
+	1    5450 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D7
+U 1 1 5958F8AB
+P 5450 3000
+F 0 "D7" H 5550 2950 60  0000 C CNN
+F 1 "DIP1" H 5550 3100 60  0000 C CNN
+F 2 "" H 5450 3000 60  0001 C CNN
+F 3 "" H 5450 3000 60  0001 C CNN
+	1    5450 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D8
+U 1 1 5958F8FF
+P 5450 3200
+F 0 "D8" H 5550 3150 60  0000 C CNN
+F 1 "DIP1" H 5550 3300 60  0000 C CNN
+F 2 "" H 5450 3200 60  0001 C CNN
+F 3 "" H 5450 3200 60  0001 C CNN
+	1    5450 3200
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D1
+U 1 1 5958F926
+P 4650 2600
+F 0 "D1" H 4750 2550 60  0000 C CNN
+F 1 "DIP1" H 4750 2700 60  0000 C CNN
+F 2 "" H 4650 2600 60  0001 C CNN
+F 3 "" H 4650 2600 60  0001 C CNN
+	1    4650 2600
+	-1   0    0    1   
+$EndComp
+$Comp
+L DIP1 D4
+U 1 1 5958F9FB
+P 4650 3200
+F 0 "D4" H 4750 3150 60  0000 C CNN
+F 1 "DIP1" H 4750 3300 60  0000 C CNN
+F 2 "" H 4650 3200 60  0001 C CNN
+F 3 "" H 4650 3200 60  0001 C CNN
+	1    4650 3200
+	-1   0    0    1   
+$EndComp
+$Comp
+L DIP1 D2
+U 1 1 5958FA2A
+P 4650 2800
+F 0 "D2" H 4750 2750 60  0000 C CNN
+F 1 "DIP1" H 4750 2900 60  0000 C CNN
+F 2 "" H 4650 2800 60  0001 C CNN
+F 3 "" H 4650 2800 60  0001 C CNN
+	1    4650 2800
+	-1   0    0    1   
+$EndComp
+$Comp
+L DIP1 D3
+U 1 1 5958FAB0
+P 4650 3000
+F 0 "D3" H 4750 2950 60  0000 C CNN
+F 1 "DIP1" H 4750 3100 60  0000 C CNN
+F 2 "" H 4650 3000 60  0001 C CNN
+F 3 "" H 4650 3000 60  0001 C CNN
+	1    4650 3000
+	-1   0    0    1   
+$EndComp
+$EndSCHEMATC
diff --git a/lm5017/lm5017.kicad_pcb b/lm5017/lm5017.kicad_pcb
new file mode 100644
index 0000000..e04bb29
--- /dev/null
+++ b/lm5017/lm5017.kicad_pcb
@@ -0,0 +1,292 @@
+(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4)
+
+  (general
+    (links 8)
+    (no_connects 0)
+    (area 134.353 93.459 152.475001 107.047)
+    (thickness 1.6)
+    (drawings 4)
+    (tracks 16)
+    (zones 0)
+    (modules 9)
+    (nets 9)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.508)
+    (trace_clearance 0.508)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 0.6)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x00030_80000001)
+      (usegerberextensions false)
+      (excludeedgelayer true)
+      (linewidth 0.050000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 2)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 "Net-(D1-Pad1)")
+  (net 2 "Net-(D2-Pad1)")
+  (net 3 "Net-(D3-Pad1)")
+  (net 4 "Net-(D4-Pad1)")
+  (net 5 "Net-(D5-Pad1)")
+  (net 6 "Net-(D6-Pad1)")
+  (net 7 "Net-(D7-Pad1)")
+  (net 8 "Net-(D8-Pad1)")
+
+  (net_class Default "Это класс цепей по умолчанию."
+    (clearance 0.508)
+    (trace_width 0.508)
+    (via_dia 0.6)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net "Net-(D1-Pad1)")
+    (add_net "Net-(D2-Pad1)")
+    (add_net "Net-(D3-Pad1)")
+    (add_net "Net-(D4-Pad1)")
+    (add_net "Net-(D5-Pad1)")
+    (add_net "Net-(D6-Pad1)")
+    (add_net "Net-(D7-Pad1)")
+    (add_net "Net-(D8-Pad1)")
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA11)
+    (at 137.16 99.06)
+    (path /5958F926)
+    (fp_text reference D1 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 1 "Net-(D1-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958FADE) (tstamp 5958FA16)
+    (at 137.16 104.14)
+    (path /5958FA2A)
+    (fp_text reference D2 (at 0.254 -1.778 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 2 "Net-(D2-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958FAF1) (tstamp 5958FA1B)
+    (at 137.16 101.6)
+    (path /5958FAB0)
+    (fp_text reference D3 (at 0.254 -1.778 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 3 "Net-(D3-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958FAB9) (tstamp 5958FA20)
+    (at 137.16 96.52 270)
+    (path /5958F9FB)
+    (fp_text reference D4 (at 0.254 -1.778 450) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524 270) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0 270) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 4 "Net-(D4-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA25)
+    (at 149.86 99.06)
+    (path /5958F7BA)
+    (fp_text reference D5 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 5 "Net-(D5-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA2A)
+    (at 149.86 96.52)
+    (path /5958F879)
+    (fp_text reference D6 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 6 "Net-(D6-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA2F)
+    (at 149.86 101.6)
+    (path /5958F8AB)
+    (fp_text reference D7 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 7 "Net-(D7-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA34)
+    (at 149.86 104.14)
+    (path /5958F8FF)
+    (fp_text reference D8 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 8 "Net-(D8-Pad1)"))
+  )
+
+  (module w_smd_dil:so-8 (layer F.Cu) (tedit 0) (tstamp 5958FA40)
+    (at 143.51 100.076 270)
+    (descr SO-8)
+    (path /5958F6D2)
+    (fp_text reference U1 (at 0 -1.016 270) (layer F.SilkS)
+      (effects (font (size 0.7493 0.7493) (thickness 0.14986)))
+    )
+    (fp_text value LM5017MR (at 0 1.016 270) (layer F.SilkS)
+      (effects (font (size 0.7493 0.7493) (thickness 0.14986)))
+    )
+    (fp_line (start -2.413 -1.9812) (end -2.413 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.413 1.9812) (end 2.413 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.413 1.9812) (end 2.413 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.413 -1.9812) (end -2.413 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -1.905 -1.9812) (end -1.905 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start -0.635 -1.9812) (end -0.635 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 0.635 -1.9812) (end 0.635 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 1.905 -3.0734) (end 1.905 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 1.905 1.9812) (end 1.905 3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 0.635 3.0734) (end 0.635 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -0.635 3.0734) (end -0.635 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -1.905 3.0734) (end -1.905 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_circle (center -1.6764 1.2446) (end -1.9558 1.6256) (layer F.SilkS) (width 0.127))
+    (pad 1 smd rect (at -1.905 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 4 "Net-(D4-Pad1)"))
+    (pad 2 smd rect (at -0.635 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 1 "Net-(D1-Pad1)"))
+    (pad 3 smd rect (at 0.635 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 3 "Net-(D3-Pad1)"))
+    (pad 4 smd rect (at 1.905 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 2 "Net-(D2-Pad1)"))
+    (pad 5 smd rect (at 1.905 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 8 "Net-(D8-Pad1)"))
+    (pad 6 smd rect (at 0.635 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 7 "Net-(D7-Pad1)"))
+    (pad 7 smd rect (at -0.635 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 5 "Net-(D5-Pad1)"))
+    (pad 8 smd rect (at -1.905 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 6 "Net-(D6-Pad1)"))
+    (model walter/smd_dil/so-8.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_line (start 134.62 106.68) (end 134.62 93.98) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 152.4 106.68) (end 134.62 106.68) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 152.4 93.98) (end 152.4 106.68) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 134.62 93.98) (end 152.4 93.98) (angle 90) (layer Edge.Cuts) (width 0.15))
+
+  (segment (start 140.716 99.441) (end 137.541 99.441) (width 0.508) (layer F.Cu) (net 1))
+  (segment (start 137.541 99.441) (end 137.16 99.06) (width 0.508) (layer F.Cu) (net 1) (tstamp 5958FC35))
+  (segment (start 140.716 101.981) (end 139.319 101.981) (width 0.508) (layer F.Cu) (net 2))
+  (segment (start 139.319 101.981) (end 137.16 104.14) (width 0.508) (layer F.Cu) (net 2) (tstamp 5958FC3B))
+  (segment (start 140.716 100.711) (end 138.049 100.711) (width 0.508) (layer F.Cu) (net 3))
+  (segment (start 138.049 100.711) (end 137.16 101.6) (width 0.508) (layer F.Cu) (net 3) (tstamp 5958FC38))
+  (segment (start 140.716 98.171) (end 138.811 98.171) (width 0.508) (layer F.Cu) (net 4))
+  (segment (start 138.811 98.171) (end 137.16 96.52) (width 0.508) (layer F.Cu) (net 4) (tstamp 5958FC32))
+  (segment (start 146.304 99.441) (end 149.479 99.441) (width 0.508) (layer F.Cu) (net 5))
+  (segment (start 149.479 99.441) (end 149.86 99.06) (width 0.508) (layer F.Cu) (net 5) (tstamp 5958FC41))
+  (segment (start 146.304 98.171) (end 148.209 98.171) (width 0.508) (layer F.Cu) (net 6))
+  (segment (start 148.209 98.171) (end 149.86 96.52) (width 0.508) (layer F.Cu) (net 6) (tstamp 5958FC3E))
+  (segment (start 146.304 100.711) (end 148.971 100.711) (width 0.508) (layer F.Cu) (net 7))
+  (segment (start 148.971 100.711) (end 149.86 101.6) (width 0.508) (layer F.Cu) (net 7) (tstamp 5958FC44))
+  (segment (start 146.304 101.981) (end 147.701 101.981) (width 0.508) (layer F.Cu) (net 8))
+  (segment (start 147.701 101.981) (end 149.86 104.14) (width 0.508) (layer F.Cu) (net 8) (tstamp 5958FC47))
+
+)
diff --git a/lm5017/lm5017.kicad_pcb-bak b/lm5017/lm5017.kicad_pcb-bak
new file mode 100644
index 0000000..edb2a53
--- /dev/null
+++ b/lm5017/lm5017.kicad_pcb-bak
@@ -0,0 +1,292 @@
+(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4)
+
+  (general
+    (links 8)
+    (no_connects 0)
+    (area 0 0 0 0)
+    (thickness 1.6)
+    (drawings 4)
+    (tracks 16)
+    (zones 0)
+    (modules 9)
+    (nets 9)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.508)
+    (trace_clearance 0.508)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 0.6)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x00030_80000001)
+      (usegerberextensions false)
+      (excludeedgelayer true)
+      (linewidth 0.050000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 2)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 "Net-(D1-Pad1)")
+  (net 2 "Net-(D2-Pad1)")
+  (net 3 "Net-(D3-Pad1)")
+  (net 4 "Net-(D4-Pad1)")
+  (net 5 "Net-(D5-Pad1)")
+  (net 6 "Net-(D6-Pad1)")
+  (net 7 "Net-(D7-Pad1)")
+  (net 8 "Net-(D8-Pad1)")
+
+  (net_class Default "Это класс цепей по умолчанию."
+    (clearance 0.508)
+    (trace_width 0.508)
+    (via_dia 0.6)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net "Net-(D1-Pad1)")
+    (add_net "Net-(D2-Pad1)")
+    (add_net "Net-(D3-Pad1)")
+    (add_net "Net-(D4-Pad1)")
+    (add_net "Net-(D5-Pad1)")
+    (add_net "Net-(D6-Pad1)")
+    (add_net "Net-(D7-Pad1)")
+    (add_net "Net-(D8-Pad1)")
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA11)
+    (at 137.16 99.06)
+    (path /5958F926)
+    (fp_text reference D1 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 1 "Net-(D1-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958FADE) (tstamp 5958FA16)
+    (at 137.16 104.14)
+    (path /5958FA2A)
+    (fp_text reference D2 (at 0.254 -1.778 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 2 "Net-(D2-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958FAF1) (tstamp 5958FA1B)
+    (at 137.16 101.6)
+    (path /5958FAB0)
+    (fp_text reference D3 (at 0.254 -1.778 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 3 "Net-(D3-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958FAB9) (tstamp 5958FA20)
+    (at 137.16 96.52 270)
+    (path /5958F9FB)
+    (fp_text reference D4 (at 0.254 -1.778 450) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524 270) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0 270) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 4 "Net-(D4-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA25)
+    (at 149.86 99.06)
+    (path /5958F7BA)
+    (fp_text reference D5 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 5 "Net-(D5-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA2A)
+    (at 149.86 96.52)
+    (path /5958F879)
+    (fp_text reference D6 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 6 "Net-(D6-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA2F)
+    (at 149.86 101.6)
+    (path /5958F8AB)
+    (fp_text reference D7 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 7 "Net-(D7-Pad1)"))
+  )
+
+  (module custom:1pin (layer F.Cu) (tedit 5958F8D5) (tstamp 5958FA34)
+    (at 149.86 104.14)
+    (path /5958F8FF)
+    (fp_text reference D8 (at 0.254 -1.778) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value DIP1 (at 0 1.524) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 8 "Net-(D8-Pad1)"))
+  )
+
+  (module w_smd_dil:so-8 (layer F.Cu) (tedit 0) (tstamp 5958FA40)
+    (at 143.51 100.076 270)
+    (descr SO-8)
+    (path /5958F6D2)
+    (fp_text reference U1 (at 0 -1.016 270) (layer F.SilkS)
+      (effects (font (size 0.7493 0.7493) (thickness 0.14986)))
+    )
+    (fp_text value LM5017MR (at 0 1.016 270) (layer F.SilkS)
+      (effects (font (size 0.7493 0.7493) (thickness 0.14986)))
+    )
+    (fp_line (start -2.413 -1.9812) (end -2.413 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.413 1.9812) (end 2.413 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.413 1.9812) (end 2.413 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.413 -1.9812) (end -2.413 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -1.905 -1.9812) (end -1.905 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start -0.635 -1.9812) (end -0.635 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 0.635 -1.9812) (end 0.635 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 1.905 -3.0734) (end 1.905 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 1.905 1.9812) (end 1.905 3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 0.635 3.0734) (end 0.635 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -0.635 3.0734) (end -0.635 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -1.905 3.0734) (end -1.905 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_circle (center -1.6764 1.2446) (end -1.9558 1.6256) (layer F.SilkS) (width 0.127))
+    (pad 1 smd rect (at -1.905 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 4 "Net-(D4-Pad1)"))
+    (pad 2 smd rect (at -0.635 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 1 "Net-(D1-Pad1)"))
+    (pad 3 smd rect (at 0.635 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 3 "Net-(D3-Pad1)"))
+    (pad 4 smd rect (at 1.905 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 2 "Net-(D2-Pad1)"))
+    (pad 5 smd rect (at 1.905 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 8 "Net-(D8-Pad1)"))
+    (pad 6 smd rect (at 0.635 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 7 "Net-(D7-Pad1)"))
+    (pad 7 smd rect (at -0.635 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 5 "Net-(D5-Pad1)"))
+    (pad 8 smd rect (at -1.905 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 6 "Net-(D6-Pad1)"))
+    (model walter/smd_dil/so-8.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_line (start 134.62 106.68) (end 134.62 93.98) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 152.4 106.68) (end 134.62 106.68) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 152.4 93.98) (end 152.4 106.68) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 134.62 93.98) (end 152.4 93.98) (angle 90) (layer Edge.Cuts) (width 0.15))
+
+  (segment (start 140.716 99.441) (end 137.541 99.441) (width 0.508) (layer F.Cu) (net 1) (status C00000))
+  (segment (start 137.541 99.441) (end 137.16 99.06) (width 0.508) (layer F.Cu) (net 1) (tstamp 5958FC35) (status C00000))
+  (segment (start 140.716 101.981) (end 139.319 101.981) (width 0.508) (layer F.Cu) (net 2) (status 400000))
+  (segment (start 139.319 101.981) (end 137.16 104.14) (width 0.508) (layer F.Cu) (net 2) (tstamp 5958FC3B) (status 800000))
+  (segment (start 140.716 100.711) (end 138.049 100.711) (width 0.508) (layer F.Cu) (net 3) (status 400000))
+  (segment (start 138.049 100.711) (end 137.16 101.6) (width 0.508) (layer F.Cu) (net 3) (tstamp 5958FC38) (status 800000))
+  (segment (start 140.716 98.171) (end 138.811 98.171) (width 0.508) (layer F.Cu) (net 4) (status 400000))
+  (segment (start 138.811 98.171) (end 137.16 96.52) (width 0.508) (layer F.Cu) (net 4) (tstamp 5958FC32) (status 800000))
+  (segment (start 146.304 99.441) (end 149.479 99.441) (width 0.508) (layer F.Cu) (net 5) (status C00000))
+  (segment (start 149.479 99.441) (end 149.86 99.06) (width 0.508) (layer F.Cu) (net 5) (tstamp 5958FC41) (status C00000))
+  (segment (start 146.304 98.171) (end 148.209 98.171) (width 0.508) (layer F.Cu) (net 6) (status 400000))
+  (segment (start 148.209 98.171) (end 149.86 96.52) (width 0.508) (layer F.Cu) (net 6) (tstamp 5958FC3E) (status 800000))
+  (segment (start 146.304 100.711) (end 148.971 100.711) (width 0.508) (layer F.Cu) (net 7) (status 400000))
+  (segment (start 148.971 100.711) (end 149.86 101.6) (width 0.508) (layer F.Cu) (net 7) (tstamp 5958FC44) (status 800000))
+  (segment (start 146.304 101.981) (end 147.701 101.981) (width 0.508) (layer F.Cu) (net 8) (status 400000))
+  (segment (start 147.701 101.981) (end 149.86 104.14) (width 0.508) (layer F.Cu) (net 8) (tstamp 5958FC47) (status 800000))
+
+)
diff --git a/lm5017/lm5017.net b/lm5017/lm5017.net
new file mode 100644
index 0000000..9a432d0
--- /dev/null
+++ b/lm5017/lm5017.net
@@ -0,0 +1,124 @@
+(export (version D)
+  (design
+    (source "/home/pro/Рабочий стол/kicad/lm5017/lm5017.sch")
+    (date "Вс 02 июл 2017 16:49:23")
+    (tool "Eeschema 4.0.5+dfsg1-4")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date)
+        (source lm5017.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref U1)
+      (value LM5017MR)
+      (footprint w_smd_dil:so-8)
+      (libsource (lib dc-dc) (part LM5017MR))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5958F6D2))
+    (comp (ref D5)
+      (value DIP1)
+      (footprint custom:1pin)
+      (libsource (lib custom) (part DIP1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5958F7BA))
+    (comp (ref D6)
+      (value DIP1)
+      (footprint custom:1pin)
+      (libsource (lib custom) (part DIP1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5958F879))
+    (comp (ref D7)
+      (value DIP1)
+      (footprint custom:1pin)
+      (libsource (lib custom) (part DIP1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5958F8AB))
+    (comp (ref D8)
+      (value DIP1)
+      (footprint custom:1pin)
+      (libsource (lib custom) (part DIP1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5958F8FF))
+    (comp (ref D1)
+      (value DIP1)
+      (footprint custom:1pin)
+      (libsource (lib custom) (part DIP1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5958F926))
+    (comp (ref D4)
+      (value DIP1)
+      (footprint custom:1pin)
+      (libsource (lib custom) (part DIP1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5958F9FB))
+    (comp (ref D2)
+      (value DIP1)
+      (footprint custom:1pin)
+      (libsource (lib custom) (part DIP1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5958FA2A))
+    (comp (ref D3)
+      (value DIP1)
+      (footprint custom:1pin)
+      (libsource (lib custom) (part DIP1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5958FAB0)))
+  (libparts
+    (libpart (lib custom) (part DIP1)
+      (fields
+        (field (name Reference) D)
+        (field (name Value) DIP1))
+      (pins
+        (pin (num 1) (name ~) (type passive))))
+    (libpart (lib dc-dc) (part LM5017MR)
+      (description "600 mA, 100V Step-Down Switching Regulator")
+      (docs http://www.national.com/ds/LM/LM5017.pdf)
+      (fields
+        (field (name Reference) U)
+        (field (name Value) LM5017MR)
+        (field (name Footprint) PSOP-8))
+      (pins
+        (pin (num 1) (name RTN) (type power_in))
+        (pin (num 2) (name VIN) (type input))
+        (pin (num 3) (name ULVO) (type input))
+        (pin (num 4) (name RON) (type input))
+        (pin (num 5) (name FB) (type input))
+        (pin (num 6) (name VCC) (type output))
+        (pin (num 7) (name BST) (type input))
+        (pin (num 8) (name SW) (type output)))))
+  (libraries
+    (library (logical dc-dc)
+      (uri /home/pro/proj/kicad-library/library/dc-dc.lib))
+    (library (logical custom)
+      (uri "/home/pro/Рабочий стол/kicad/lib/custom.lib")))
+  (nets
+    (net (code 1) (name "Net-(D4-Pad1)")
+      (node (ref U1) (pin 1))
+      (node (ref D4) (pin 1)))
+    (net (code 2) (name "Net-(D1-Pad1)")
+      (node (ref U1) (pin 2))
+      (node (ref D1) (pin 1)))
+    (net (code 3) (name "Net-(D3-Pad1)")
+      (node (ref U1) (pin 3))
+      (node (ref D3) (pin 1)))
+    (net (code 4) (name "Net-(D2-Pad1)")
+      (node (ref U1) (pin 4))
+      (node (ref D2) (pin 1)))
+    (net (code 5) (name "Net-(D8-Pad1)")
+      (node (ref U1) (pin 5))
+      (node (ref D8) (pin 1)))
+    (net (code 6) (name "Net-(D7-Pad1)")
+      (node (ref U1) (pin 6))
+      (node (ref D7) (pin 1)))
+    (net (code 7) (name "Net-(D5-Pad1)")
+      (node (ref U1) (pin 7))
+      (node (ref D5) (pin 1)))
+    (net (code 8) (name "Net-(D6-Pad1)")
+      (node (ref U1) (pin 8))
+      (node (ref D6) (pin 1)))))
\ No newline at end of file
diff --git a/lm5017/lm5017.pro b/lm5017/lm5017.pro
new file mode 100644
index 0000000..7c659df
--- /dev/null
+++ b/lm5017/lm5017.pro
@@ -0,0 +1,62 @@
+update=Вс 02 июл 2017 16:39:56
+version=1
+last_client=kicad
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[general]
+version=1
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=digital-audio
+LibName22=philips
+LibName23=display
+LibName24=cypress
+LibName25=siliconi
+LibName26=opto
+LibName27=atmel
+LibName28=contrib
+LibName29=valves
+LibName30=/home/pro/proj/kicad-library/library/dc-dc
+LibName31=/home/pro/Рабочий стол/kicad/lib/custom
diff --git a/lm5017/lm5017.sch b/lm5017/lm5017.sch
new file mode 100644
index 0000000..efef9d9
--- /dev/null
+++ b/lm5017/lm5017.sch
@@ -0,0 +1,147 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:dc-dc
+LIBS:custom
+LIBS:lm5017-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L LM5017MR U1
+U 1 1 5958F6D2
+P 5050 2900
+F 0 "U1" H 4750 3450 50  0000 L CNN
+F 1 "LM5017MR" H 4750 3350 50  0000 L CNN
+F 2 "w_smd_dil:so-8" H 5050 2450 50  0001 C CIN
+F 3 "" H 5050 2900 50  0001 C CNN
+	1    5050 2900
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D5
+U 1 1 5958F7BA
+P 5450 2600
+F 0 "D5" H 5550 2550 60  0000 C CNN
+F 1 "DIP1" H 5550 2700 60  0000 C CNN
+F 2 "custom:1pin" H 5450 2600 60  0001 C CNN
+F 3 "" H 5450 2600 60  0001 C CNN
+	1    5450 2600
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D6
+U 1 1 5958F879
+P 5450 2800
+F 0 "D6" H 5550 2750 60  0000 C CNN
+F 1 "DIP1" H 5550 2900 60  0000 C CNN
+F 2 "custom:1pin" H 5450 2800 60  0001 C CNN
+F 3 "" H 5450 2800 60  0001 C CNN
+	1    5450 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D7
+U 1 1 5958F8AB
+P 5450 3000
+F 0 "D7" H 5550 2950 60  0000 C CNN
+F 1 "DIP1" H 5550 3100 60  0000 C CNN
+F 2 "custom:1pin" H 5450 3000 60  0001 C CNN
+F 3 "" H 5450 3000 60  0001 C CNN
+	1    5450 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D8
+U 1 1 5958F8FF
+P 5450 3200
+F 0 "D8" H 5550 3150 60  0000 C CNN
+F 1 "DIP1" H 5550 3300 60  0000 C CNN
+F 2 "custom:1pin" H 5450 3200 60  0001 C CNN
+F 3 "" H 5450 3200 60  0001 C CNN
+	1    5450 3200
+	1    0    0    -1  
+$EndComp
+$Comp
+L DIP1 D1
+U 1 1 5958F926
+P 4650 2600
+F 0 "D1" H 4750 2550 60  0000 C CNN
+F 1 "DIP1" H 4750 2700 60  0000 C CNN
+F 2 "custom:1pin" H 4650 2600 60  0001 C CNN
+F 3 "" H 4650 2600 60  0001 C CNN
+	1    4650 2600
+	-1   0    0    1   
+$EndComp
+$Comp
+L DIP1 D4
+U 1 1 5958F9FB
+P 4650 3200
+F 0 "D4" H 4750 3150 60  0000 C CNN
+F 1 "DIP1" H 4750 3300 60  0000 C CNN
+F 2 "custom:1pin" H 4650 3200 60  0001 C CNN
+F 3 "" H 4650 3200 60  0001 C CNN
+	1    4650 3200
+	-1   0    0    1   
+$EndComp
+$Comp
+L DIP1 D2
+U 1 1 5958FA2A
+P 4650 2800
+F 0 "D2" H 4750 2750 60  0000 C CNN
+F 1 "DIP1" H 4750 2900 60  0000 C CNN
+F 2 "custom:1pin" H 4650 2800 60  0001 C CNN
+F 3 "" H 4650 2800 60  0001 C CNN
+	1    4650 2800
+	-1   0    0    1   
+$EndComp
+$Comp
+L DIP1 D3
+U 1 1 5958FAB0
+P 4650 3000
+F 0 "D3" H 4750 2950 60  0000 C CNN
+F 1 "DIP1" H 4750 3100 60  0000 C CNN
+F 2 "custom:1pin" H 4650 3000 60  0001 C CNN
+F 3 "" H 4650 3000 60  0001 C CNN
+	1    4650 3000
+	-1   0    0    1   
+$EndComp
+$EndSCHEMATC
diff --git a/velocomputer/velocomputer-cache.lib b/velocomputer/velocomputer-cache.lib
new file mode 100644
index 0000000..b186a6f
--- /dev/null
+++ b/velocomputer/velocomputer-cache.lib
@@ -0,0 +1,164 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# CP1
+#
+DEF CP1 C 0 10 N N 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "CP1" 25 -100 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ CP_*
+$ENDFPLIST
+DRAW
+A 0 -150 128 1287 513 0 1 20 N -80 -50 80 -50
+P 2 0 1 20 -80 30 80 30 N
+P 2 0 1 0 -70 90 -30 90 N
+P 2 0 1 0 -50 70 -50 110 N
+X ~ 1 0 150 110 D 50 50 1 1 P
+X ~ 2 0 -150 130 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# CP1_Small
+#
+DEF CP1_Small C 0 10 N N 1 F N
+F0 "C" 10 70 50 H V L CNN
+F1 "CP1_Small" 10 -80 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ CP_*
+$ENDFPLIST
+DRAW
+A 0 -140 125 1186 614 0 1 12 N -60 -30 60 -30
+P 2 0 1 12 -60 20 60 20 N
+P 2 0 1 0 -50 60 -30 60 N
+P 2 0 1 0 -40 50 -40 70 N
+X ~ 1 0 100 80 D 50 50 1 1 P
+X ~ 2 0 -100 80 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# L
+#
+DEF L L 0 40 N N 1 F N
+F0 "L" -50 0 50 V V C CNN
+F1 "L" 75 0 50 V V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Choke_*
+ *Coil*
+ Inductor_*
+ L_*
+$ENDFPLIST
+DRAW
+A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
+A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
+A 0 25 25 -899 899 0 1 0 N 0 0 0 50
+A 0 75 25 -899 899 0 1 0 N 0 50 0 100
+X 1 1 0 150 50 D 50 50 1 1 P
+X 2 2 0 -150 50 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# LM5017MR
+#
+DEF LM5017MR U 0 40 Y Y 1 F N
+F0 "U" -300 550 50 H V L CNN
+F1 "LM5017MR" -300 450 50 H V L CNN
+F2 "PSOP-8" 0 -450 50 H I C CIN
+F3 "" 0 0 50 H I C CNN
+DRAW
+S -300 400 300 -400 0 1 10 f
+X RTN 1 -400 -300 100 R 50 50 1 1 W
+X VIN 2 -400 300 100 R 50 50 1 1 I
+X ULVO 3 -400 -100 100 R 50 50 1 1 I
+X RON 4 -400 100 100 R 50 50 1 1 I
+X FB 5 400 -300 100 L 50 50 1 1 I
+X VCC 6 400 -100 100 L 50 50 1 1 O
+X BST 7 400 300 100 L 50 50 1 1 I
+X SW 8 400 100 100 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PWR_FLAG
+#
+DEF PWR_FLAG #FLG 0 0 N N 1 F P
+F0 "#FLG" 0 75 50 H I C CNN
+F1 "PWR_FLAG" 0 150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+X pwr 1 0 0 0 U 50 50 0 0 w
+P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
+ENDDRAW
+ENDDEF
+#
+# R
+#
+DEF R R 0 0 N Y 1 F N
+F0 "R" 80 0 50 V V C CNN
+F1 "R" 0 0 50 V V C CNN
+F2 "" -70 0 50 V I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ R_*
+ R_*
+$ENDFPLIST
+DRAW
+S -40 -100 40 100 0 1 10 N
+X ~ 1 0 150 50 D 50 50 1 1 P
+X ~ 2 0 -150 50 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Screw_Terminal_1x01
+#
+DEF Screw_Terminal_1x01 J 0 30 Y N 1 F N
+F0 "J" 0 150 50 H V C TNN
+F1 "Screw_Terminal_1x01" -150 0 50 V V C TNN
+F2 "" 0 -125 50 H I C CNN
+F3 "" 0 -100 50 H I C CNN
+$FPLIST
+ TerminalBlock*1pol
+$ENDFPLIST
+DRAW
+C 25 0 50 0 1 10 N
+S -50 75 100 -75 0 1 10 f
+P 2 0 1 10 0 40 65 -25 N
+P 2 0 1 10 50 -40 -15 25 N
+X ~ 1 200 0 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# VDD
+#
+DEF VDD #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "VDD" 0 150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+C 0 75 25 0 1 0 N
+P 2 0 1 0 0 0 0 50 N
+X VDD 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/velocomputer/velocomputer.bak b/velocomputer/velocomputer.bak
new file mode 100644
index 0000000..7fb8ee3
--- /dev/null
+++ b/velocomputer/velocomputer.bak
@@ -0,0 +1,324 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:dc-dc
+LIBS:velocomputer-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
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+	1    2000 1300
+	1    0    0    -1  
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+	1    3650 1400
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+	1    3650 1750
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+	1    0    0    -1  
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+$Comp
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+Wire Wire Line
+	1000 1400 1000 900 
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+F 3 "" H 1350 1050 50  0001 C CNN
+	1    1350 1050
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
+	1350 1200 1600 1200
+Connection ~ 1350 900 
+$Comp
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+F 3 "" H 2800 1050 50  0001 C CNN
+	1    2800 1050
+	1    0    0    -1  
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+Wire Wire Line
+	2400 1000 2400 900 
+Wire Wire Line
+	2400 900  2800 900 
+Wire Wire Line
+	2400 1200 3150 1200
+Wire Wire Line
+	2400 1400 2650 1400
+$Comp
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+F 3 "" H 2800 1400 50  0001 C CNN
+	1    2800 1400
+	0    -1   -1   0   
+$EndComp
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+F 3 "" H 2950 1400 50  0001 C CNN
+	1    2950 1400
+	1    0    0    -1  
+$EndComp
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+	1    3300 1200
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	2400 1600 3650 1600
+Wire Wire Line
+	3450 1200 4450 1200
+Wire Wire Line
+	3650 1200 3650 1250
+Wire Wire Line
+	3650 1600 3650 1550
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+F 2 "" H 3650 1900 50  0001 C CNN
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+	1    3650 1900
+	1    0    0    -1  
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+Connection ~ 4050 1200
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+F 3 "" H 4050 1650 50  0001 C CNN
+	1    4050 1650
+	1    0    0    -1  
+$EndComp
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+F 3 "" H 4050 1800 50  0001 C CNN
+	1    4050 1800
+	1    0    0    -1  
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+L PWR_FLAG #FLG06
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+F 3 "" H 1350 2450 50  0001 C CNN
+	1    1350 2450
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+$EndComp
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+L PWR_FLAG #FLG07
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+	1    1750 2450
+	1    0    0    -1  
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+F 2 "" H 1350 2450 50  0001 C CNN
+F 3 "" H 1350 2450 50  0001 C CNN
+	1    1350 2450
+	-1   0    0    1   
+$EndComp
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+F 3 "" H 1750 2450 50  0001 C CNN
+	1    1750 2450
+	1    0    0    -1  
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+F 3 "" H 800 800 50  0001 C CNN
+	1    800  900 
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+	1    4650 1200
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+$EndComp
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+F 3 "" H 4600 1850 50  0001 C CNN
+	1    4600 1950
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+$EndComp
+$Comp
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+F 3 "" H 4400 1950 50  0001 C CNN
+	1    4400 1950
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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diff --git a/velocomputer/velocomputer.bin b/velocomputer/velocomputer.bin
new file mode 100644
index 0000000..838abe0
Binary files /dev/null and b/velocomputer/velocomputer.bin differ
diff --git a/velocomputer/velocomputer.dsn b/velocomputer/velocomputer.dsn
new file mode 100644
index 0000000..dfca117
--- /dev/null
+++ b/velocomputer/velocomputer.dsn
@@ -0,0 +1,251 @@
+(pcb "/home/pro/Рабочий стол/velocomputer/velocomputer.dsn"
+  (parser
+    (string_quote ")
+    (space_in_quoted_tokens on)
+    (host_cad "KiCad's Pcbnew")
+    (host_version "4.0.5+dfsg1-4")
+  )
+  (resolution um 10)
+  (unit um)
+  (structure
+    (layer F.Cu
+      (type signal)
+      (property
+        (index 0)
+      )
+    )
+    (layer B.Cu
+      (type signal)
+      (property
+        (index 1)
+      )
+    )
+    (boundary
+      (path pcb 0  58420 -63500  58420 -88900  106680 -88900  106680 -63500
+            58420 -63500  58420 -63500)
+    )
+    (plane GND (polygon F.Cu 0  58420 -63500  106680 -63500  106680 -88900  58420 -88900))
+    (plane GND (polygon B.Cu 0  58420 -63500  106680 -63500  106680 -88900  58420 -88900))
+    (via "Via[0-1]_1500:500_um")
+    (rule
+      (width 800)
+      (clearance 500.1)
+      (clearance 500.1 (type default_smd))
+      (clearance 125 (type smd_smd))
+    )
+  )
+  (placement
+    (component Capacitors_SMD:C_1206_HandSoldering
+      (place C1 95250 -69850 front 0 (PN CP1_Small))
+      (place C2 95250 -74930 front 0 (PN CP1_Small))
+      (place C4 85090 -85090 front 0 (PN CP1_Small))
+      (place C5 85090 -80010 front 0 (PN CP1_Small))
+    )
+    (component mylib:CP_Radial_D5.0mm_P2.50mm
+      (place C3 83820 -68580 front 0 (PN 100mjuF))
+    )
+    (component mylib:Wire_Pad_1pin
+      (place J1 63500 -68580 front 0 (PN Screw_Terminal_1x01))
+      (place J2 63500 -83820 front 0 (PN Screw_Terminal_1x01))
+      (place J3 101600 -83820 front 0 (PN Screw_Terminal_1x01))
+      (place J4 101600 -68580 front 0 (PN Screw_Terminal_1x01))
+    )
+    (component mylib:INDUCTOR_V
+      (place L1 76200 -68580 front 0 (PN 220mjuH))
+    )
+    (component Resistors_SMD:R_1206_HandSoldering
+      (place R1 72390 -76200 front 0 (PN 250K))
+      (place R2 95250 -80010 front 0 (PN 470K))
+      (place R3 95250 -85090 front 0 (PN 150K))
+    )
+    (component "w_smd_dil:psop-8"
+      (place U1 73660 -82550 front 270 (PN LM5017MR))
+    )
+  )
+  (library
+    (image Capacitors_SMD:C_1206_HandSoldering
+      (outline (path signal 100  -1600 -800  -1600 800))
+      (outline (path signal 100  1600 -800  -1600 -800))
+      (outline (path signal 100  1600 800  1600 -800))
+      (outline (path signal 100  -1600 800  1600 800))
+      (outline (path signal 120  1000 1020  -1000 1020))
+      (outline (path signal 120  -1000 -1020  1000 -1020))
+      (outline (path signal 50  -3250 1050  3250 1050))
+      (outline (path signal 50  -3250 1050  -3250 -1050))
+      (outline (path signal 50  3250 -1050  3250 1050))
+      (outline (path signal 50  3250 -1050  -3250 -1050))
+      (pin Rect[T]Pad_2000x1600_um 1 -2000 0)
+      (pin Rect[T]Pad_2000x1600_um 2 2000 0)
+    )
+    (image mylib:CP_Radial_D5.0mm_P2.50mm
+      (outline (path signal 150  5849.93 0  5650.64 -1258.3  5072.26 -2393.42  4171.42 -3294.26
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+            3036.3 3872.64  4171.42 3294.26  5072.26 2393.42  5650.64 1258.3))
+      (outline (path signal 100  -3724 0  -2524 0))
+      (outline (path signal 100  -3124 650  -3124 -650))
+      (outline (path signal 120  -3724 0  -2524 0))
+      (outline (path signal 120  -3124 650  -3124 -650))
+      (outline (path signal 100  5746 0  5550.81 -1232.36  4984.36 -2344.09  4102.09 -3226.36
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+            2990.36 3792.81  4102.09 3226.36  4984.36 2344.09  5550.81 1232.36))
+      (pin Rect[A]Pad_2000x2000_um 1 0 0)
+      (pin Round[A]Pad_2000_um 2 3556 0)
+    )
+    (image mylib:Wire_Pad_1pin
+      (pin Round[A]Pad_2000_um 1 0 0)
+    )
+    (image mylib:INDUCTOR_V
+      (outline (path signal 150  3810 0  3623.53 -1177.36  3082.36 -2239.46  2239.46 -3082.36
+            1177.36 -3623.53  0 -3810  -1177.36 -3623.53  -2239.46 -3082.36
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+            1177.36 3623.53  2239.46 3082.36  3082.36 2239.46  3623.53 1177.36))
+      (pin Rect[A]Pad_2000x2000_um 1 -2540 0)
+      (pin Round[A]Pad_2000_um 2 2540 0)
+    )
+    (image Resistors_SMD:R_1206_HandSoldering
+      (outline (path signal 100  -1600 -800  -1600 800))
+      (outline (path signal 100  1600 -800  -1600 -800))
+      (outline (path signal 100  1600 800  1600 -800))
+      (outline (path signal 100  -1600 800  1600 800))
+      (outline (path signal 120  1000 -1070  -1000 -1070))
+      (outline (path signal 120  -1000 1070  1000 1070))
+      (outline (path signal 50  -3250 1110  3250 1110))
+      (outline (path signal 50  -3250 1110  -3250 -1100))
+      (outline (path signal 50  3250 -1100  3250 1110))
+      (outline (path signal 50  3250 -1100  -3250 -1100))
+      (pin Rect[T]Pad_2000x1700_um 1 -2000 0)
+      (pin Rect[T]Pad_2000x1700_um 2 2000 0)
+    )
+    (image "w_smd_dil:psop-8"
+      (outline (path signal 300  -1600 -1300  -1604.89 -1330.9  -1619.1 -1358.78  -1641.22 -1380.9
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+            -1638.2 -1109.79  -1582.44 -1138.2  -1538.2 -1182.44  -1509.79 -1238.2))
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+            -1576.39 -919.577  -1464.89 -976.393  -1376.39 -1064.89  -1319.58 -1176.39))
+      (outline (path signal 127  -2700 -2400  -2800 -2300))
+      (outline (path signal 127  -2600 -2400  -2800 -2200))
+      (outline (path signal 127  -2500 -2400  -2800 -2100))
+      (outline (path signal 127  -2400 -2400  -2800 -2000))
+      (outline (path signal 127  -2300 -2400  -2800 -2400))
+      (outline (path signal 127  -2800 -2400  -2800 -1900))
+      (outline (path signal 127  -2800 -1900  -2300 -2400))
+      (outline (path signal 127  -2413 1981.2  -2413 -1981.2))
+      (outline (path signal 127  -2413 -1981.2  2413 -1981.2))
+      (outline (path signal 127  2413 -1981.2  2413 1981.2))
+      (outline (path signal 127  2413 1981.2  -2413 1981.2))
+      (outline (path signal 127  -1905 1981.2  -1905 3073.4))
+      (outline (path signal 127  -635 1981.2  -635 3073.4))
+      (outline (path signal 127  635 1981.2  635 3073.4))
+      (outline (path signal 127  1905 3073.4  1905 1981.2))
+      (outline (path signal 127  1905 -1981.2  1905 -3073.4))
+      (outline (path signal 127  635 -3073.4  635 -1981.2))
+      (outline (path signal 127  -635 -3073.4  -635 -1981.2))
+      (outline (path signal 127  -1905 -3073.4  -1905 -1981.2))
+      (pin Rect[T]Pad_599.44x1998.98_um 1 -1905 -2794)
+      (pin Rect[T]Pad_599.44x1998.98_um 2 -635 -2794)
+      (pin Rect[T]Pad_599.44x1998.98_um 3 635 -2794)
+      (pin Rect[T]Pad_599.44x1998.98_um 4 1905 -2794)
+      (pin Rect[T]Pad_599.44x1998.98_um 5 1905 2794)
+      (pin Rect[T]Pad_599.44x1998.98_um 6 635 2794)
+      (pin Rect[T]Pad_599.44x1998.98_um 7 -635 2794)
+      (pin Rect[T]Pad_599.44x1998.98_um 8 -1905 2794)
+      (pin Rect[T]Pad_3200.4x2499.36_um 9 0 0)
+    )
+    (padstack Round[A]Pad_2000_um
+      (shape (circle F.Cu 2000))
+      (shape (circle B.Cu 2000))
+      (attach off)
+    )
+    (padstack Rect[A]Pad_2000x2000_um
+      (shape (rect F.Cu -1000 -1000 1000 1000))
+      (shape (rect B.Cu -1000 -1000 1000 1000))
+      (attach off)
+    )
+    (padstack Rect[T]Pad_2000x1600_um
+      (shape (rect F.Cu -1000 -800 1000 800))
+      (attach off)
+    )
+    (padstack Rect[T]Pad_2000x1700_um
+      (shape (rect F.Cu -1000 -850 1000 850))
+      (attach off)
+    )
+    (padstack Rect[T]Pad_3200.4x2499.36_um
+      (shape (rect F.Cu -1600.2 -1249.68 1600.2 1249.68))
+      (attach off)
+    )
+    (padstack Rect[T]Pad_599.44x1998.98_um
+      (shape (rect F.Cu -299.72 -999.49 299.72 999.49))
+      (attach off)
+    )
+    (padstack "Via[0-1]_1500:500_um"
+      (shape (circle F.Cu 1500))
+      (shape (circle B.Cu 1500))
+      (attach off)
+    )
+  )
+  (network
+    (net "Net-(C1-Pad1)"
+      (pins C1-1 U1-6)
+    )
+    (net "Net-(C1-Pad2)"
+      (pins C1-2 C2-1)
+    )
+    (net GND
+      (pins C2-2 C3-2 J2-1 J3-1 R3-2 U1-1)
+    )
+    (net "Net-(C3-Pad1)"
+      (pins C3-1 J4-1 L1-1 R2-1)
+    )
+    (net VDD
+      (pins J1-1 R1-1 U1-2 U1-3)
+    )
+    (net "Net-(R1-Pad2)"
+      (pins R1-2 U1-4)
+    )
+    (net "Net-(R2-Pad2)"
+      (pins R2-2 R3-1 U1-5)
+    )
+    (net "Net-(C4-Pad1)"
+      (pins C4-1 U1-7)
+    )
+    (net "Net-(C4-Pad2)"
+      (pins C4-2 C5-1)
+    )
+    (net "Net-(C5-Pad2)"
+      (pins C5-2 L1-2 U1-8)
+    )
+    (class kicad_default "" GND "Net-(C1-Pad1)" "Net-(C1-Pad2)" "Net-(C2-Pad1)"
+      "Net-(C3-Pad1)" "Net-(C4-Pad1)" "Net-(C4-Pad2)" "Net-(C5-Pad2)" "Net-(R1-Pad2)"
+      "Net-(R2-Pad2)" VDD
+      (circuit
+        (use_via Via[0-1]_1500:500_um)
+      )
+      (rule
+        (width 800)
+        (clearance 500.1)
+      )
+    )
+  )
+  (wiring
+  )
+)
diff --git a/velocomputer/velocomputer.kicad_pcb b/velocomputer/velocomputer.kicad_pcb
new file mode 100644
index 0000000..f85b827
--- /dev/null
+++ b/velocomputer/velocomputer.kicad_pcb
@@ -0,0 +1,902 @@
+(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4)
+
+  (general
+    (links 20)
+    (no_connects 0)
+    (area 58.344999 63.424999 106.755001 88.975001)
+    (thickness 1.6)
+    (drawings 6)
+    (tracks 67)
+    (zones 0)
+    (modules 17)
+    (nets 11)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user hide)
+    (33 F.Adhes user hide)
+    (34 B.Paste user hide)
+    (35 F.Paste user hide)
+    (36 B.SilkS user hide)
+    (37 F.SilkS user)
+    (38 B.Mask user hide)
+    (39 F.Mask user hide)
+    (40 Dwgs.User user hide)
+    (41 Cmts.User user hide)
+    (42 Eco1.User user hide)
+    (43 Eco2.User user hide)
+    (44 Edge.Cuts user)
+    (45 Margin user hide)
+    (46 B.CrtYd user hide)
+    (47 F.CrtYd user hide)
+    (48 B.Fab user hide)
+    (49 F.Fab user hide)
+  )
+
+  (setup
+    (last_trace_width 0.8)
+    (trace_clearance 0.5)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 1.5)
+    (via_drill 0.5)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1 1)
+    (pad_drill 0.5)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 58.42 63.5)
+    (grid_origin 58.42 63.5)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x01030_80000001)
+      (usegerberextensions false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 2)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 "Net-(C1-Pad1)")
+  (net 2 "Net-(C1-Pad2)")
+  (net 3 GND)
+  (net 4 "Net-(C3-Pad1)")
+  (net 5 VDD)
+  (net 6 "Net-(R1-Pad2)")
+  (net 7 "Net-(R2-Pad2)")
+  (net 8 "Net-(C4-Pad1)")
+  (net 9 "Net-(C4-Pad2)")
+  (net 10 "Net-(C5-Pad2)")
+
+  (net_class Default "Это класс цепей по умолчанию."
+    (clearance 0.5)
+    (trace_width 0.8)
+    (via_dia 1.5)
+    (via_drill 0.5)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net GND)
+    (add_net "Net-(C1-Pad1)")
+    (add_net "Net-(C1-Pad2)")
+    (add_net "Net-(C3-Pad1)")
+    (add_net "Net-(C4-Pad1)")
+    (add_net "Net-(C4-Pad2)")
+    (add_net "Net-(C5-Pad2)")
+    (add_net "Net-(R1-Pad2)")
+    (add_net "Net-(R2-Pad2)")
+    (add_net VDD)
+  )
+
+  (module mylib:align_hole (layer F.Cu) (tedit 59569E5C) (tstamp 5956BA48)
+    (at 104.648 86.868)
+    (descr "module 1 pin (ou trou mecanique de percage)")
+    (tags DEV)
+    (zone_connect 0)
+    (fp_text reference REF** (at 0 -3.048) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "" (at 0 3) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
+    (pad "" np_thru_hole circle (at 0 0) (size 1 1) (drill 0.5) (layers *.Cu *.Mask)
+      (zone_connect 0))
+  )
+
+  (module mylib:align_hole (layer F.Cu) (tedit 59569E5C) (tstamp 5956BA43)
+    (at 60.452 86.868)
+    (descr "module 1 pin (ou trou mecanique de percage)")
+    (tags DEV)
+    (zone_connect 0)
+    (fp_text reference REF** (at 0 -3.048) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "" (at 0 3) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
+    (pad "" np_thru_hole circle (at 0 0) (size 1 1) (drill 0.5) (layers *.Cu *.Mask)
+      (zone_connect 0))
+  )
+
+  (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 58AA84D1) (tstamp 5956A459)
+    (at 95.25 69.85)
+    (descr "Capacitor SMD 1206, hand soldering")
+    (tags "capacitor 1206")
+    (path /595692D9)
+    (attr smd)
+    (fp_text reference C1 (at 0 -1.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CP1_Small (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 -1.75) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -1.02) (end -1 -1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 1.02) (end 1 1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 "Net-(C1-Pad1)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 "Net-(C1-Pad2)"))
+    (model Capacitors_SMD.3dshapes/C_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 58AA84D1) (tstamp 5956A45F)
+    (at 95.25 74.93)
+    (descr "Capacitor SMD 1206, hand soldering")
+    (tags "capacitor 1206")
+    (path /59569490)
+    (attr smd)
+    (fp_text reference C2 (at 0 -1.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CP1_Small (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 -1.75) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -1.02) (end -1 -1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 1.02) (end 1 1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 "Net-(C1-Pad2)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 3 GND))
+    (model Capacitors_SMD.3dshapes/C_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module mylib:CP_Radial_D5.0mm_P2.50mm (layer F.Cu) (tedit 595003AF) (tstamp 5956A466)
+    (at 83.82 68.58)
+    (descr "CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor")
+    (tags "CP Radial series Radial pin pitch 2.50mm  diameter 5mm Electrolytic Capacitor")
+    (path /5943CA41)
+    (fp_text reference C3 (at 1.778 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 100mjuF (at 2.032 4.826) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 1.778 0) (end 5.842 -0.254) (layer F.SilkS) (width 0.15))
+    (fp_text user %R (at 1.778 -2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -3.724 0) (end -2.524 0) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.124 -0.65) (end -3.124 0.65) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.724 0) (end -2.524 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.124 -0.65) (end -3.124 0.65) (layer F.SilkS) (width 0.12))
+    (fp_circle (center 1.758 0) (end 5.746 0) (layer F.Fab) (width 0.1))
+    (pad 1 thru_hole rect (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 4 "Net-(C3-Pad1)"))
+    (pad 2 thru_hole circle (at 3.556 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_D5.0mm_P2.50mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 58AA84D1) (tstamp 5956A46C)
+    (at 85.09 85.09)
+    (descr "Capacitor SMD 1206, hand soldering")
+    (tags "capacitor 1206")
+    (path /59569517)
+    (attr smd)
+    (fp_text reference C4 (at 0 -1.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CP1_Small (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 -1.75) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -1.02) (end -1 -1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 1.02) (end 1 1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 8 "Net-(C4-Pad1)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 9 "Net-(C4-Pad2)"))
+    (model Capacitors_SMD.3dshapes/C_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 58AA84D1) (tstamp 5956A472)
+    (at 85.09 80.01)
+    (descr "Capacitor SMD 1206, hand soldering")
+    (tags "capacitor 1206")
+    (path /59569581)
+    (attr smd)
+    (fp_text reference C5 (at 0 -1.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CP1_Small (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 -1.75) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -1.02) (end -1 -1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 1.02) (end 1 1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 9 "Net-(C4-Pad2)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 10 "Net-(C5-Pad2)"))
+    (model Capacitors_SMD.3dshapes/C_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module mylib:Wire_Pad_1pin (layer F.Cu) (tedit 594FFEB6) (tstamp 5956A477)
+    (at 63.5 68.58)
+    (path /594C33F7)
+    (fp_text reference J1 (at 0 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Screw_Terminal_1x01 (at 0 2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 5 VDD))
+  )
+
+  (module mylib:Wire_Pad_1pin (layer F.Cu) (tedit 594FFEB6) (tstamp 5956A47C)
+    (at 63.5 83.82)
+    (path /594C3430)
+    (fp_text reference J2 (at 0 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Screw_Terminal_1x01 (at 0 2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+  )
+
+  (module mylib:Wire_Pad_1pin (layer F.Cu) (tedit 594FFEB6) (tstamp 5956A481)
+    (at 101.6 83.82)
+    (path /594C35C3)
+    (fp_text reference J3 (at 0 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Screw_Terminal_1x01 (at 0 2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+  )
+
+  (module mylib:Wire_Pad_1pin (layer F.Cu) (tedit 594FFEB6) (tstamp 5956A486)
+    (at 101.6 68.58)
+    (path /594C355C)
+    (fp_text reference J4 (at 0 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Screw_Terminal_1x01 (at 0 2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 4 "Net-(C3-Pad1)"))
+  )
+
+  (module mylib:INDUCTOR_V (layer F.Cu) (tedit 595000CB) (tstamp 5956A48D)
+    (at 76.2 68.58)
+    (descr "Inductor (vertical)")
+    (tags INDUCTOR)
+    (path /5943C155)
+    (fp_text reference L1 (at 0 1.99898) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 220mjuH (at 0.09906 -1.99898) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.81 0) (layer F.SilkS) (width 0.15))
+    (pad 1 thru_hole rect (at -2.54 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 4 "Net-(C3-Pad1)"))
+    (pad 2 thru_hole circle (at 2.54 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 10 "Net-(C5-Pad2)"))
+    (model Inductors.3dshapes/INDUCTOR_V.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 2 2 2))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistors_SMD:R_1206_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5956A493)
+    (at 72.39 76.2)
+    (descr "Resistor SMD 1206, hand soldering")
+    (tags "resistor 1206")
+    (path /5943BDE3)
+    (attr smd)
+    (fp_text reference R1 (at 0 -1.85) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 250K (at 0 1.9) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.7 0.7) (thickness 0.105)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 1.07) (end -1 1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 -1.07) (end 1 -1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.11) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.11) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 5 VDD))
+    (pad 2 smd rect (at 2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 6 "Net-(R1-Pad2)"))
+    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistors_SMD:R_1206_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5956A499)
+    (at 95.25 80.01)
+    (descr "Resistor SMD 1206, hand soldering")
+    (tags "resistor 1206")
+    (path /5943BA61)
+    (attr smd)
+    (fp_text reference R2 (at 0 -1.85) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 470K (at 0 1.9) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.7 0.7) (thickness 0.105)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 1.07) (end -1 1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 -1.07) (end 1 -1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.11) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.11) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 4 "Net-(C3-Pad1)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 7 "Net-(R2-Pad2)"))
+    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistors_SMD:R_1206_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5956A49F)
+    (at 95.25 85.09)
+    (descr "Resistor SMD 1206, hand soldering")
+    (tags "resistor 1206")
+    (path /5943BABE)
+    (attr smd)
+    (fp_text reference R3 (at 0 -1.85) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 150K (at 0 1.9) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.7 0.7) (thickness 0.105)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 1.07) (end -1 1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 -1.07) (end 1 -1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.11) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.11) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 7 "Net-(R2-Pad2)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 3 GND))
+    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module w_smd_dil:psop-8 (layer F.Cu) (tedit 0) (tstamp 5956A4AC)
+    (at 73.66 82.55 270)
+    (descr PSOP-8)
+    (path /5943B948)
+    (fp_text reference U1 (at 0 -1.016 270) (layer F.SilkS)
+      (effects (font (size 0.7493 0.7493) (thickness 0.14986)))
+    )
+    (fp_text value LM5017MR (at 0 1.016 270) (layer F.SilkS)
+      (effects (font (size 0.7493 0.7493) (thickness 0.14986)))
+    )
+    (fp_circle (center -1.7 1.3) (end -1.8 1.3) (layer F.SilkS) (width 0.3))
+    (fp_circle (center -1.7 1.3) (end -1.9 1.3) (layer F.SilkS) (width 0.127))
+    (fp_circle (center -1.7 1.3) (end -2 1.3) (layer F.SilkS) (width 0.127))
+    (fp_circle (center -1.7 1.3) (end -2.1 1.3) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.7 2.4) (end -2.8 2.3) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.6 2.4) (end -2.8 2.2) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.5 2.4) (end -2.8 2.1) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.4 2.4) (end -2.8 2) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.3 2.4) (end -2.8 2.4) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.8 2.4) (end -2.8 1.9) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.8 1.9) (end -2.3 2.4) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.413 -1.9812) (end -2.413 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.413 1.9812) (end 2.413 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.413 1.9812) (end 2.413 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.413 -1.9812) (end -2.413 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -1.905 -1.9812) (end -1.905 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start -0.635 -1.9812) (end -0.635 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 0.635 -1.9812) (end 0.635 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 1.905 -3.0734) (end 1.905 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 1.905 1.9812) (end 1.905 3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 0.635 3.0734) (end 0.635 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -0.635 3.0734) (end -0.635 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -1.905 3.0734) (end -1.905 1.9812) (layer F.SilkS) (width 0.127))
+    (pad 1 smd rect (at -1.905 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 3 GND))
+    (pad 2 smd rect (at -0.635 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 5 VDD))
+    (pad 3 smd rect (at 0.635 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 5 VDD))
+    (pad 4 smd rect (at 1.905 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 6 "Net-(R1-Pad2)"))
+    (pad 5 smd rect (at 1.905 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 7 "Net-(R2-Pad2)"))
+    (pad 6 smd rect (at 0.635 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 1 "Net-(C1-Pad1)"))
+    (pad 7 smd rect (at -0.635 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 8 "Net-(C4-Pad1)"))
+    (pad 8 smd rect (at -1.905 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 10 "Net-(C5-Pad2)"))
+    (pad 9 smd rect (at 0 0 270) (size 3.2004 2.49936) (layers F.Cu F.Paste F.Mask))
+    (model walter/smd_dil/psop-8.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module mylib:align_hole (layer F.Cu) (tedit 59569E5C) (tstamp 5956BA3D)
+    (at 60.452 65.532)
+    (descr "module 1 pin (ou trou mecanique de percage)")
+    (tags DEV)
+    (zone_connect 0)
+    (fp_text reference REF** (at 0 -3.048) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "" (at 0 3) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
+    (pad "" np_thru_hole circle (at 0 0) (size 1 1) (drill 0.5) (layers *.Cu *.Mask)
+      (zone_connect 0))
+  )
+
+  (dimension 48.26 (width 0.3) (layer F.SilkS)
+    (gr_text "48,260 мм" (at 82.55 46.91) (layer F.SilkS)
+      (effects (font (size 1.5 1.5) (thickness 0.3)))
+    )
+    (feature1 (pts (xy 106.68 63.5) (xy 106.68 45.56)))
+    (feature2 (pts (xy 58.42 63.5) (xy 58.42 45.56)))
+    (crossbar (pts (xy 58.42 48.26) (xy 106.68 48.26)))
+    (arrow1a (pts (xy 106.68 48.26) (xy 105.553496 48.846421)))
+    (arrow1b (pts (xy 106.68 48.26) (xy 105.553496 47.673579)))
+    (arrow2a (pts (xy 58.42 48.26) (xy 59.546504 48.846421)))
+    (arrow2b (pts (xy 58.42 48.26) (xy 59.546504 47.673579)))
+  )
+  (gr_line (start 58.42 88.9) (end 58.42 63.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 106.68 88.9) (end 58.42 88.9) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 106.68 63.5) (end 106.68 88.9) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 58.42 63.5) (end 106.68 63.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (target plus (at 58.42 63.5) (size 5) (width 0.15) (layer Edge.Cuts))
+
+  (via (at 80.5449 83.9723) (size 1.5) (layers F.Cu B.Cu) (net 1))
+  (via (at 80.915 77.705) (size 1.5) (layers F.Cu B.Cu) (net 1))
+  (segment (start 76.454 83.2154) (end 76.454 83.185) (width 0.5992) (layer F.Cu) (net 1))
+  (segment (start 79.788 83.2154) (end 80.5449 83.9723) (width 0.8) (layer F.Cu) (net 1))
+  (segment (start 76.454 83.2154) (end 79.788 83.2154) (width 0.8) (layer F.Cu) (net 1))
+  (segment (start 80.5449 78.0751) (end 80.915 77.705) (width 0.8) (layer B.Cu) (net 1))
+  (segment (start 80.5449 83.9723) (end 80.5449 78.0751) (width 0.8) (layer B.Cu) (net 1))
+  (segment (start 87.0697 71.5503) (end 93.25 71.5503) (width 0.8) (layer F.Cu) (net 1))
+  (segment (start 80.915 77.705) (end 87.0697 71.5503) (width 0.8) (layer F.Cu) (net 1))
+  (segment (start 93.25 69.85) (end 93.25 71.5503) (width 0.8) (layer F.Cu) (net 1))
+  (segment (start 95.5706 73.2297) (end 97.25 71.5503) (width 0.8) (layer F.Cu) (net 2))
+  (segment (start 93.25 73.2297) (end 95.5706 73.2297) (width 0.8) (layer F.Cu) (net 2))
+  (segment (start 93.25 74.93) (end 93.25 73.2297) (width 0.8) (layer F.Cu) (net 2))
+  (segment (start 97.25 69.85) (end 97.25 71.5503) (width 0.8) (layer F.Cu) (net 2))
+  (segment (start 93.25 80.01) (end 93.25 78.2597) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 97.0124 78.2597) (end 93.25 78.2597) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 101.6 73.6721) (end 97.0124 78.2597) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 101.6 68.58) (end 101.6 73.6721) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 85.7628 66.6372) (end 83.82 68.58) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 99.6572 66.6372) (end 85.7628 66.6372) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 101.6 68.58) (end 99.6572 66.6372) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 73.66 68.58) (end 75.5603 68.58) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 77.4606 66.6797) (end 75.5603 68.58) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 80.0194 66.6797) (end 77.4606 66.6797) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 81.9197 68.58) (end 80.0194 66.6797) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 83.82 68.58) (end 81.9197 68.58) (width 0.8) (layer F.Cu) (net 4))
+  (segment (start 74.56165 72.75835) (end 67.67835 72.75835) (width 0.8) (layer F.Cu) (net 5))
+  (segment (start 67.67835 72.75835) (end 63.5 68.58) (width 0.8) (layer F.Cu) (net 5) (tstamp 5956A6A0))
+  (segment (start 70.866 83.185) (end 70.866 81.915) (width 0.8) (layer F.Cu) (net 5))
+  (segment (start 68.9662 79.3741) (end 68.9662 81.915) (width 0.8) (layer F.Cu) (net 5))
+  (segment (start 70.39 77.9503) (end 68.9662 79.3741) (width 0.8) (layer F.Cu) (net 5))
+  (segment (start 70.39 76.2) (end 70.39 77.9503) (width 0.8) (layer F.Cu) (net 5))
+  (segment (start 70.866 81.915) (end 68.9662 81.915) (width 0.8) (layer F.Cu) (net 5))
+  (segment (start 75.7859 77.9503) (end 70.39 77.9503) (width 0.8) (layer F.Cu) (net 5))
+  (segment (start 76.2904 77.4458) (end 75.7859 77.9503) (width 0.8) (layer F.Cu) (net 5))
+  (segment (start 76.2904 74.4871) (end 76.2904 77.4458) (width 0.8) (layer F.Cu) (net 5))
+  (segment (start 74.56165 72.75835) (end 76.2904 74.4871) (width 0.8) (layer F.Cu) (net 5) (tstamp 5956A69E))
+  (segment (start 69.58 84.4854) (end 70.8356 84.4854) (width 0.8) (layer F.Cu) (net 6))
+  (segment (start 67.6458 82.5512) (end 69.58 84.4854) (width 0.8) (layer F.Cu) (net 6))
+  (segment (start 67.6458 75.781) (end 67.6458 82.5512) (width 0.8) (layer F.Cu) (net 6))
+  (segment (start 68.9771 74.4497) (end 67.6458 75.781) (width 0.8) (layer F.Cu) (net 6))
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+  (segment (start 70.8356 84.4854) (end 70.866 84.455) (width 0.5992) (layer F.Cu) (net 6))
+  (segment (start 74.39 76.2) (end 74.39 74.4497) (width 0.8) (layer F.Cu) (net 6))
+  (segment (start 97.25 80.01) (end 97.25 81.7603) (width 0.8) (layer F.Cu) (net 7))
+  (segment (start 76.454 84.9499) (end 76.454 84.455) (width 0.5992) (layer F.Cu) (net 7))
+  (segment (start 78.2948 86.7907) (end 76.454 84.9499) (width 0.8) (layer F.Cu) (net 7))
+  (segment (start 89.649 86.7907) (end 78.2948 86.7907) (width 0.8) (layer F.Cu) (net 7))
+  (segment (start 91.3497 85.09) (end 89.649 86.7907) (width 0.8) (layer F.Cu) (net 7))
+  (segment (start 95.6706 83.3397) (end 97.25 81.7603) (width 0.8) (layer F.Cu) (net 7))
+  (segment (start 93.25 83.3397) (end 95.6706 83.3397) (width 0.8) (layer F.Cu) (net 7))
+  (segment (start 93.25 85.09) (end 93.25 83.3397) (width 0.8) (layer F.Cu) (net 7))
+  (segment (start 93.25 85.09) (end 91.3497 85.09) (width 0.8) (layer F.Cu) (net 7))
+  (segment (start 81.6153 81.915) (end 83.09 83.3897) (width 0.8) (layer F.Cu) (net 8))
+  (segment (start 76.454 81.915) (end 81.6153 81.915) (width 0.8) (layer F.Cu) (net 8))
+  (segment (start 83.09 85.09) (end 83.09 83.3897) (width 0.8) (layer F.Cu) (net 8))
+  (segment (start 86.4697 83.3897) (end 87.09 83.3897) (width 0.8) (layer F.Cu) (net 9))
+  (segment (start 83.09 80.01) (end 86.4697 83.3897) (width 0.8) (layer F.Cu) (net 9))
+  (segment (start 87.09 85.09) (end 87.09 83.3897) (width 0.8) (layer F.Cu) (net 9))
+  (via (at 87.0508 77.705) (size 1.5) (layers F.Cu B.Cu) (net 10))
+  (segment (start 78.74 77.9504) (end 76.454 80.2364) (width 0.8) (layer F.Cu) (net 10))
+  (segment (start 78.74 68.58) (end 78.74 77.9504) (width 0.8) (layer F.Cu) (net 10))
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+  (segment (start 87.0508 76.8908) (end 87.0508 77.705) (width 0.8) (layer B.Cu) (net 10))
+  (segment (start 78.74 68.58) (end 87.0508 76.8908) (width 0.8) (layer B.Cu) (net 10))
+  (segment (start 87.09 77.7442) (end 87.09 80.01) (width 0.8) (layer F.Cu) (net 10))
+  (segment (start 87.0508 77.705) (end 87.09 77.7442) (width 0.8) (layer F.Cu) (net 10))
+
+  (zone (net 3) (net_name GND) (layer F.Cu) (tstamp 5956A419) (hatch edge 0.508)
+    (connect_pads (clearance 0.508))
+    (min_thickness 0.254)
+    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
+    (polygon
+      (pts
+        (xy 58.42 63.5) (xy 106.68 63.5) (xy 106.68 88.9) (xy 58.42 88.9)
+      )
+    )
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diff --git a/velocomputer/velocomputer.kicad_pcb-bak b/velocomputer/velocomputer.kicad_pcb-bak
new file mode 100644
index 0000000..f85b827
--- /dev/null
+++ b/velocomputer/velocomputer.kicad_pcb-bak
@@ -0,0 +1,902 @@
+(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4)
+
+  (general
+    (links 20)
+    (no_connects 0)
+    (area 58.344999 63.424999 106.755001 88.975001)
+    (thickness 1.6)
+    (drawings 6)
+    (tracks 67)
+    (zones 0)
+    (modules 17)
+    (nets 11)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user hide)
+    (33 F.Adhes user hide)
+    (34 B.Paste user hide)
+    (35 F.Paste user hide)
+    (36 B.SilkS user hide)
+    (37 F.SilkS user)
+    (38 B.Mask user hide)
+    (39 F.Mask user hide)
+    (40 Dwgs.User user hide)
+    (41 Cmts.User user hide)
+    (42 Eco1.User user hide)
+    (43 Eco2.User user hide)
+    (44 Edge.Cuts user)
+    (45 Margin user hide)
+    (46 B.CrtYd user hide)
+    (47 F.CrtYd user hide)
+    (48 B.Fab user hide)
+    (49 F.Fab user hide)
+  )
+
+  (setup
+    (last_trace_width 0.8)
+    (trace_clearance 0.5)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 1.5)
+    (via_drill 0.5)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1 1)
+    (pad_drill 0.5)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 58.42 63.5)
+    (grid_origin 58.42 63.5)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x01030_80000001)
+      (usegerberextensions false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 2)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 "Net-(C1-Pad1)")
+  (net 2 "Net-(C1-Pad2)")
+  (net 3 GND)
+  (net 4 "Net-(C3-Pad1)")
+  (net 5 VDD)
+  (net 6 "Net-(R1-Pad2)")
+  (net 7 "Net-(R2-Pad2)")
+  (net 8 "Net-(C4-Pad1)")
+  (net 9 "Net-(C4-Pad2)")
+  (net 10 "Net-(C5-Pad2)")
+
+  (net_class Default "Это класс цепей по умолчанию."
+    (clearance 0.5)
+    (trace_width 0.8)
+    (via_dia 1.5)
+    (via_drill 0.5)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net GND)
+    (add_net "Net-(C1-Pad1)")
+    (add_net "Net-(C1-Pad2)")
+    (add_net "Net-(C3-Pad1)")
+    (add_net "Net-(C4-Pad1)")
+    (add_net "Net-(C4-Pad2)")
+    (add_net "Net-(C5-Pad2)")
+    (add_net "Net-(R1-Pad2)")
+    (add_net "Net-(R2-Pad2)")
+    (add_net VDD)
+  )
+
+  (module mylib:align_hole (layer F.Cu) (tedit 59569E5C) (tstamp 5956BA48)
+    (at 104.648 86.868)
+    (descr "module 1 pin (ou trou mecanique de percage)")
+    (tags DEV)
+    (zone_connect 0)
+    (fp_text reference REF** (at 0 -3.048) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "" (at 0 3) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
+    (pad "" np_thru_hole circle (at 0 0) (size 1 1) (drill 0.5) (layers *.Cu *.Mask)
+      (zone_connect 0))
+  )
+
+  (module mylib:align_hole (layer F.Cu) (tedit 59569E5C) (tstamp 5956BA43)
+    (at 60.452 86.868)
+    (descr "module 1 pin (ou trou mecanique de percage)")
+    (tags DEV)
+    (zone_connect 0)
+    (fp_text reference REF** (at 0 -3.048) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "" (at 0 3) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
+    (pad "" np_thru_hole circle (at 0 0) (size 1 1) (drill 0.5) (layers *.Cu *.Mask)
+      (zone_connect 0))
+  )
+
+  (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 58AA84D1) (tstamp 5956A459)
+    (at 95.25 69.85)
+    (descr "Capacitor SMD 1206, hand soldering")
+    (tags "capacitor 1206")
+    (path /595692D9)
+    (attr smd)
+    (fp_text reference C1 (at 0 -1.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CP1_Small (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 -1.75) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -1.02) (end -1 -1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 1.02) (end 1 1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 "Net-(C1-Pad1)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 "Net-(C1-Pad2)"))
+    (model Capacitors_SMD.3dshapes/C_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 58AA84D1) (tstamp 5956A45F)
+    (at 95.25 74.93)
+    (descr "Capacitor SMD 1206, hand soldering")
+    (tags "capacitor 1206")
+    (path /59569490)
+    (attr smd)
+    (fp_text reference C2 (at 0 -1.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CP1_Small (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 -1.75) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -1.02) (end -1 -1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 1.02) (end 1 1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 "Net-(C1-Pad2)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 3 GND))
+    (model Capacitors_SMD.3dshapes/C_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module mylib:CP_Radial_D5.0mm_P2.50mm (layer F.Cu) (tedit 595003AF) (tstamp 5956A466)
+    (at 83.82 68.58)
+    (descr "CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor")
+    (tags "CP Radial series Radial pin pitch 2.50mm  diameter 5mm Electrolytic Capacitor")
+    (path /5943CA41)
+    (fp_text reference C3 (at 1.778 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 100mjuF (at 2.032 4.826) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 1.778 0) (end 5.842 -0.254) (layer F.SilkS) (width 0.15))
+    (fp_text user %R (at 1.778 -2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -3.724 0) (end -2.524 0) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.124 -0.65) (end -3.124 0.65) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.724 0) (end -2.524 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.124 -0.65) (end -3.124 0.65) (layer F.SilkS) (width 0.12))
+    (fp_circle (center 1.758 0) (end 5.746 0) (layer F.Fab) (width 0.1))
+    (pad 1 thru_hole rect (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 4 "Net-(C3-Pad1)"))
+    (pad 2 thru_hole circle (at 3.556 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/CP_Radial_D5.0mm_P2.50mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 58AA84D1) (tstamp 5956A46C)
+    (at 85.09 85.09)
+    (descr "Capacitor SMD 1206, hand soldering")
+    (tags "capacitor 1206")
+    (path /59569517)
+    (attr smd)
+    (fp_text reference C4 (at 0 -1.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CP1_Small (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 -1.75) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -1.02) (end -1 -1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 1.02) (end 1 1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 8 "Net-(C4-Pad1)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 9 "Net-(C4-Pad2)"))
+    (model Capacitors_SMD.3dshapes/C_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 58AA84D1) (tstamp 5956A472)
+    (at 85.09 80.01)
+    (descr "Capacitor SMD 1206, hand soldering")
+    (tags "capacitor 1206")
+    (path /59569581)
+    (attr smd)
+    (fp_text reference C5 (at 0 -1.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CP1_Small (at 0 2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 -1.75) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -1.02) (end -1 -1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 1.02) (end 1 1.02) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end 3.25 -1.05) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.05) (end -3.25 1.05) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 9 "Net-(C4-Pad2)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 10 "Net-(C5-Pad2)"))
+    (model Capacitors_SMD.3dshapes/C_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module mylib:Wire_Pad_1pin (layer F.Cu) (tedit 594FFEB6) (tstamp 5956A477)
+    (at 63.5 68.58)
+    (path /594C33F7)
+    (fp_text reference J1 (at 0 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Screw_Terminal_1x01 (at 0 2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 5 VDD))
+  )
+
+  (module mylib:Wire_Pad_1pin (layer F.Cu) (tedit 594FFEB6) (tstamp 5956A47C)
+    (at 63.5 83.82)
+    (path /594C3430)
+    (fp_text reference J2 (at 0 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Screw_Terminal_1x01 (at 0 2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+  )
+
+  (module mylib:Wire_Pad_1pin (layer F.Cu) (tedit 594FFEB6) (tstamp 5956A481)
+    (at 101.6 83.82)
+    (path /594C35C3)
+    (fp_text reference J3 (at 0 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Screw_Terminal_1x01 (at 0 2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+  )
+
+  (module mylib:Wire_Pad_1pin (layer F.Cu) (tedit 594FFEB6) (tstamp 5956A486)
+    (at 101.6 68.58)
+    (path /594C355C)
+    (fp_text reference J4 (at 0 -2.54) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Screw_Terminal_1x01 (at 0 2.54) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 4 "Net-(C3-Pad1)"))
+  )
+
+  (module mylib:INDUCTOR_V (layer F.Cu) (tedit 595000CB) (tstamp 5956A48D)
+    (at 76.2 68.58)
+    (descr "Inductor (vertical)")
+    (tags INDUCTOR)
+    (path /5943C155)
+    (fp_text reference L1 (at 0 1.99898) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 220mjuH (at 0.09906 -1.99898) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.81 0) (layer F.SilkS) (width 0.15))
+    (pad 1 thru_hole rect (at -2.54 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 4 "Net-(C3-Pad1)"))
+    (pad 2 thru_hole circle (at 2.54 0) (size 2 2) (drill 1) (layers *.Cu *.Mask)
+      (net 10 "Net-(C5-Pad2)"))
+    (model Inductors.3dshapes/INDUCTOR_V.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 2 2 2))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistors_SMD:R_1206_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5956A493)
+    (at 72.39 76.2)
+    (descr "Resistor SMD 1206, hand soldering")
+    (tags "resistor 1206")
+    (path /5943BDE3)
+    (attr smd)
+    (fp_text reference R1 (at 0 -1.85) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 250K (at 0 1.9) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.7 0.7) (thickness 0.105)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 1.07) (end -1 1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 -1.07) (end 1 -1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.11) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.11) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 5 VDD))
+    (pad 2 smd rect (at 2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 6 "Net-(R1-Pad2)"))
+    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistors_SMD:R_1206_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5956A499)
+    (at 95.25 80.01)
+    (descr "Resistor SMD 1206, hand soldering")
+    (tags "resistor 1206")
+    (path /5943BA61)
+    (attr smd)
+    (fp_text reference R2 (at 0 -1.85) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 470K (at 0 1.9) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.7 0.7) (thickness 0.105)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 1.07) (end -1 1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 -1.07) (end 1 -1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.11) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.11) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 4 "Net-(C3-Pad1)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 7 "Net-(R2-Pad2)"))
+    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistors_SMD:R_1206_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5956A49F)
+    (at 95.25 85.09)
+    (descr "Resistor SMD 1206, hand soldering")
+    (tags "resistor 1206")
+    (path /5943BABE)
+    (attr smd)
+    (fp_text reference R3 (at 0 -1.85) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 150K (at 0 1.9) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.7 0.7) (thickness 0.105)))
+    )
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 1.07) (end -1 1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1 -1.07) (end 1 -1.07) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.25 -1.11) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.25 -1.11) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end 3.25 -1.11) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.25 1.1) (end -3.25 1.1) (layer F.CrtYd) (width 0.05))
+    (pad 1 smd rect (at -2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 7 "Net-(R2-Pad2)"))
+    (pad 2 smd rect (at 2 0) (size 2 1.7) (layers F.Cu F.Paste F.Mask)
+      (net 3 GND))
+    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module w_smd_dil:psop-8 (layer F.Cu) (tedit 0) (tstamp 5956A4AC)
+    (at 73.66 82.55 270)
+    (descr PSOP-8)
+    (path /5943B948)
+    (fp_text reference U1 (at 0 -1.016 270) (layer F.SilkS)
+      (effects (font (size 0.7493 0.7493) (thickness 0.14986)))
+    )
+    (fp_text value LM5017MR (at 0 1.016 270) (layer F.SilkS)
+      (effects (font (size 0.7493 0.7493) (thickness 0.14986)))
+    )
+    (fp_circle (center -1.7 1.3) (end -1.8 1.3) (layer F.SilkS) (width 0.3))
+    (fp_circle (center -1.7 1.3) (end -1.9 1.3) (layer F.SilkS) (width 0.127))
+    (fp_circle (center -1.7 1.3) (end -2 1.3) (layer F.SilkS) (width 0.127))
+    (fp_circle (center -1.7 1.3) (end -2.1 1.3) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.7 2.4) (end -2.8 2.3) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.6 2.4) (end -2.8 2.2) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.5 2.4) (end -2.8 2.1) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.4 2.4) (end -2.8 2) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.3 2.4) (end -2.8 2.4) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.8 2.4) (end -2.8 1.9) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.8 1.9) (end -2.3 2.4) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.413 -1.9812) (end -2.413 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.413 1.9812) (end 2.413 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.413 1.9812) (end 2.413 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.413 -1.9812) (end -2.413 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -1.905 -1.9812) (end -1.905 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start -0.635 -1.9812) (end -0.635 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 0.635 -1.9812) (end 0.635 -3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 1.905 -3.0734) (end 1.905 -1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start 1.905 1.9812) (end 1.905 3.0734) (layer F.SilkS) (width 0.127))
+    (fp_line (start 0.635 3.0734) (end 0.635 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -0.635 3.0734) (end -0.635 1.9812) (layer F.SilkS) (width 0.127))
+    (fp_line (start -1.905 3.0734) (end -1.905 1.9812) (layer F.SilkS) (width 0.127))
+    (pad 1 smd rect (at -1.905 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 3 GND))
+    (pad 2 smd rect (at -0.635 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 5 VDD))
+    (pad 3 smd rect (at 0.635 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 5 VDD))
+    (pad 4 smd rect (at 1.905 2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 6 "Net-(R1-Pad2)"))
+    (pad 5 smd rect (at 1.905 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 7 "Net-(R2-Pad2)"))
+    (pad 6 smd rect (at 0.635 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 1 "Net-(C1-Pad1)"))
+    (pad 7 smd rect (at -0.635 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 8 "Net-(C4-Pad1)"))
+    (pad 8 smd rect (at -1.905 -2.794 270) (size 0.59944 1.99898) (layers F.Cu F.Paste F.Mask)
+      (net 10 "Net-(C5-Pad2)"))
+    (pad 9 smd rect (at 0 0 270) (size 3.2004 2.49936) (layers F.Cu F.Paste F.Mask))
+    (model walter/smd_dil/psop-8.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module mylib:align_hole (layer F.Cu) (tedit 59569E5C) (tstamp 5956BA3D)
+    (at 60.452 65.532)
+    (descr "module 1 pin (ou trou mecanique de percage)")
+    (tags DEV)
+    (zone_connect 0)
+    (fp_text reference REF** (at 0 -3.048) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "" (at 0 3) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
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diff --git a/velocomputer/velocomputer.net b/velocomputer/velocomputer.net
new file mode 100644
index 0000000..38f923c
--- /dev/null
+++ b/velocomputer/velocomputer.net
@@ -0,0 +1,219 @@
+(export (version D)
+  (design
+    (source "/home/pro/Рабочий стол/velocomputer/velocomputer.sch")
+    (date "Вс 02 июл 2017 11:48:50")
+    (tool "Eeschema 4.0.5+dfsg1-4")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date)
+        (source velocomputer.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref U1)
+      (value LM5017MR)
+      (footprint w_smd_dil:psop-8)
+      (libsource (lib dc-dc) (part LM5017MR))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5943B948))
+    (comp (ref R2)
+      (value 470K)
+      (footprint Resistors_SMD:R_1206_HandSoldering)
+      (libsource (lib device) (part R))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5943BA61))
+    (comp (ref R3)
+      (value 150K)
+      (footprint Resistors_SMD:R_1206_HandSoldering)
+      (libsource (lib device) (part R))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5943BABE))
+    (comp (ref R1)
+      (value 250K)
+      (footprint Resistors_SMD:R_1206_HandSoldering)
+      (libsource (lib device) (part R))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5943BDE3))
+    (comp (ref L1)
+      (value 220mjuH)
+      (footprint mylib:INDUCTOR_V)
+      (libsource (lib device) (part L))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5943C155))
+    (comp (ref C3)
+      (value 100mjuF)
+      (footprint mylib:CP_Radial_D5.0mm_P2.50mm)
+      (libsource (lib device) (part CP1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5943CA41))
+    (comp (ref J1)
+      (value Screw_Terminal_1x01)
+      (footprint mylib:Wire_Pad_1pin)
+      (libsource (lib conn) (part Screw_Terminal_1x01))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 594C33F7))
+    (comp (ref J2)
+      (value Screw_Terminal_1x01)
+      (footprint mylib:Wire_Pad_1pin)
+      (libsource (lib conn) (part Screw_Terminal_1x01))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 594C3430))
+    (comp (ref J4)
+      (value Screw_Terminal_1x01)
+      (footprint mylib:Wire_Pad_1pin)
+      (libsource (lib conn) (part Screw_Terminal_1x01))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 594C355C))
+    (comp (ref J3)
+      (value Screw_Terminal_1x01)
+      (footprint mylib:Wire_Pad_1pin)
+      (libsource (lib conn) (part Screw_Terminal_1x01))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 594C35C3))
+    (comp (ref C1)
+      (value CP1_Small)
+      (footprint Capacitors_SMD:C_1210_HandSoldering)
+      (libsource (lib device) (part CP1_Small))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 595692D9))
+    (comp (ref C2)
+      (value CP1_Small)
+      (footprint Capacitors_SMD:C_1210_HandSoldering)
+      (libsource (lib device) (part CP1_Small))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 59569490))
+    (comp (ref C4)
+      (value CP1_Small)
+      (footprint Capacitors_SMD:C_1206_HandSoldering)
+      (libsource (lib device) (part CP1_Small))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 59569517))
+    (comp (ref C5)
+      (value CP1_Small)
+      (footprint Capacitors_SMD:C_1206_HandSoldering)
+      (libsource (lib device) (part CP1_Small))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 59569581)))
+  (libparts
+    (libpart (lib device) (part CP1)
+      (description "Polarised capacitor")
+      (footprints
+        (fp CP_*))
+      (fields
+        (field (name Reference) C)
+        (field (name Value) CP1))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib device) (part CP1_Small)
+      (description "Polarised capacitor")
+      (footprints
+        (fp CP_*))
+      (fields
+        (field (name Reference) C)
+        (field (name Value) CP1_Small))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib device) (part L)
+      (description Inductor)
+      (footprints
+        (fp Choke_*)
+        (fp *Coil*)
+        (fp Inductor_*)
+        (fp L_*))
+      (fields
+        (field (name Reference) L)
+        (field (name Value) L))
+      (pins
+        (pin (num 1) (name 1) (type passive))
+        (pin (num 2) (name 2) (type passive))))
+    (libpart (lib dc-dc) (part LM5017MR)
+      (description "600 mA, 100V Step-Down Switching Regulator")
+      (docs http://www.national.com/ds/LM/LM5017.pdf)
+      (fields
+        (field (name Reference) U)
+        (field (name Value) LM5017MR)
+        (field (name Footprint) PSOP-8))
+      (pins
+        (pin (num 1) (name RTN) (type power_in))
+        (pin (num 2) (name VIN) (type input))
+        (pin (num 3) (name ULVO) (type input))
+        (pin (num 4) (name RON) (type input))
+        (pin (num 5) (name FB) (type input))
+        (pin (num 6) (name VCC) (type output))
+        (pin (num 7) (name BST) (type input))
+        (pin (num 8) (name SW) (type output))))
+    (libpart (lib device) (part R)
+      (description Resistor)
+      (footprints
+        (fp R_*)
+        (fp R_*))
+      (fields
+        (field (name Reference) R)
+        (field (name Value) R))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib conn) (part Screw_Terminal_1x01)
+      (description "1-pin screw terminal connector")
+      (footprints
+        (fp TerminalBlock*1pol))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) Screw_Terminal_1x01))
+      (pins
+        (pin (num 1) (name ~) (type passive)))))
+  (libraries
+    (library (logical dc-dc)
+      (uri /home/pro/proj/kicad-library/library/dc-dc.lib))
+    (library (logical conn)
+      (uri /home/pro/proj/kicad-library/library/conn.lib))
+    (library (logical device)
+      (uri /home/pro/proj/kicad-library/library/device.lib)))
+  (nets
+    (net (code 1) (name VDD)
+      (node (ref J1) (pin 1))
+      (node (ref U1) (pin 3))
+      (node (ref U1) (pin 2))
+      (node (ref R1) (pin 1)))
+    (net (code 2) (name GND)
+      (node (ref U1) (pin 1))
+      (node (ref R3) (pin 2))
+      (node (ref J2) (pin 1))
+      (node (ref J3) (pin 1))
+      (node (ref C3) (pin 2))
+      (node (ref C2) (pin 2)))
+    (net (code 3) (name "Net-(C3-Pad1)")
+      (node (ref L1) (pin 1))
+      (node (ref C3) (pin 1))
+      (node (ref R2) (pin 1))
+      (node (ref J4) (pin 1)))
+    (net (code 4) (name "Net-(R2-Pad2)")
+      (node (ref R2) (pin 2))
+      (node (ref U1) (pin 5))
+      (node (ref R3) (pin 1)))
+    (net (code 5) (name "Net-(C5-Pad2)")
+      (node (ref U1) (pin 8))
+      (node (ref C5) (pin 2))
+      (node (ref L1) (pin 2)))
+    (net (code 6) (name "Net-(C4-Pad2)")
+      (node (ref C5) (pin 1))
+      (node (ref C4) (pin 2)))
+    (net (code 7) (name "Net-(C1-Pad2)")
+      (node (ref C2) (pin 1))
+      (node (ref C1) (pin 2)))
+    (net (code 8) (name "Net-(C1-Pad1)")
+      (node (ref U1) (pin 6))
+      (node (ref C1) (pin 1)))
+    (net (code 9) (name "Net-(C4-Pad1)")
+      (node (ref U1) (pin 7))
+      (node (ref C4) (pin 1)))
+    (net (code 10) (name "Net-(R1-Pad2)")
+      (node (ref R1) (pin 2))
+      (node (ref U1) (pin 4)))))
\ No newline at end of file
diff --git a/velocomputer/velocomputer.pro b/velocomputer/velocomputer.pro
new file mode 100644
index 0000000..a266b11
--- /dev/null
+++ b/velocomputer/velocomputer.pro
@@ -0,0 +1,61 @@
+update=Пт 16 июн 2017 13:55:27
+version=1
+last_client=kicad
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[general]
+version=1
+[eeschema]
+version=1
+LibDir=/home/pro/proj/kicad-library/library
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=digital-audio
+LibName22=philips
+LibName23=display
+LibName24=cypress
+LibName25=siliconi
+LibName26=opto
+LibName27=atmel
+LibName28=contrib
+LibName29=valves
+LibName30=dc-dc
diff --git a/velocomputer/velocomputer.rules b/velocomputer/velocomputer.rules
new file mode 100644
index 0000000..b32ce4a
--- /dev/null
+++ b/velocomputer/velocomputer.rules
@@ -0,0 +1,77 @@
+
+(rules PCB velocomputer
+  (snap_angle 
+    fortyfive_degree
+  )
+  (autoroute_settings
+    (fanout on)
+    (autoroute on)
+    (postroute on)
+    (vias on)
+    (via_costs 50)
+    (plane_via_costs 5)
+    (start_ripup_costs 100)
+    (start_pass_no 313)
+    (layer_rule F.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 2.9)
+    )
+    (layer_rule B.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 1.5)
+    )
+  )
+  (rule
+    (width 800.0)
+    (clear 500.2)
+    (clear 400.0 (type smd_to_turn_gap))
+    (clear 125.0 (type smd_smd))
+  )
+  (padstack "Via[0-1]_1500:500_um"
+    (shape
+      (circle F.Cu 1500.0 0.0 0.0)
+    )
+    (shape
+      (circle B.Cu 1500.0 0.0 0.0)
+    )
+    (attach off)
+  )
+  (via 
+    "Via[0-1]_1500:500_um" "Via[0-1]_1500:500_um" default
+  )
+  (via 
+    "Via[0-1]_1500:500_um-kicad_default" "Via[0-1]_1500:500_um" "kicad_default"
+  )
+  (via_rule
+    default "Via[0-1]_1500:500_um"
+  )
+  (via_rule
+    "kicad_default" "Via[0-1]_1500:500_um-kicad_default"
+  )
+  (class default
+    (clearance_class default)
+    (via_rule default)
+    (rule
+      (width 800.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+  (class "kicad_default"
+    GND "Net-(C1-Pad1)" "Net-(C1-Pad2)" "Net-(C3-Pad1)" VDD "Net-(R1-Pad2)" "Net-(R2-Pad2)" "Net-(C4-Pad1)"
+    "Net-(C4-Pad2)" "Net-(C5-Pad2)"
+    (clearance_class "kicad_default")
+    (via_rule kicad_default)
+    (rule
+      (width 800.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+)
\ No newline at end of file
diff --git a/velocomputer/velocomputer.sch b/velocomputer/velocomputer.sch
new file mode 100644
index 0000000..f404b4a
--- /dev/null
+++ b/velocomputer/velocomputer.sch
@@ -0,0 +1,344 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:dc-dc
+LIBS:velocomputer-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
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+Title ""
+Date ""
+Rev ""
+Comp ""
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+Comment2 ""
+Comment3 ""
+Comment4 ""
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+Wire Wire Line
+	4050 1500 4050 1200
+$Comp
+L CP1_Small C1
+U 1 1 595692D9
+P 2500 1400
+F 0 "C1" H 2510 1470 50  0000 L CNN
+F 1 "CP1_Small" H 2510 1320 50  0000 L CNN
+F 2 "Capacitors_SMD:C_1210_HandSoldering" H 2500 1400 50  0001 C CNN
+F 3 "" H 2500 1400 50  0001 C CNN
+	1    2500 1400
+	0    -1   -1   0   
+$EndComp
+$Comp
+L CP1_Small C2
+U 1 1 59569490
+P 2700 1400
+F 0 "C2" H 2710 1470 50  0000 L CNN
+F 1 "CP1_Small" H 2710 1320 50  0000 L CNN
+F 2 "Capacitors_SMD:C_1210_HandSoldering" H 2700 1400 50  0001 C CNN
+F 3 "" H 2700 1400 50  0001 C CNN
+	1    2700 1400
+	0    -1   -1   0   
+$EndComp
+$Comp
+L CP1_Small C4
+U 1 1 59569517
+P 2800 900
+F 0 "C4" H 2810 970 50  0000 L CNN
+F 1 "CP1_Small" H 2810 820 50  0000 L CNN
+F 2 "Capacitors_SMD:C_1206_HandSoldering" H 2800 900 50  0001 C CNN
+F 3 "" H 2800 900 50  0001 C CNN
+	1    2800 900 
+	1    0    0    -1  
+$EndComp
+$Comp
+L CP1_Small C5
+U 1 1 59569581
+P 2800 1100
+F 0 "C5" H 2810 1170 50  0000 L CNN
+F 1 "CP1_Small" H 2810 1020 50  0000 L CNN
+F 2 "Capacitors_SMD:C_1206_HandSoldering" H 2800 1100 50  0001 C CNN
+F 3 "" H 2800 1100 50  0001 C CNN
+	1    2800 1100
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC
diff --git a/velocomputer/velocomputer.ses b/velocomputer/velocomputer.ses
new file mode 100644
index 0000000..d51a4f4
--- /dev/null
+++ b/velocomputer/velocomputer.ses
@@ -0,0 +1,322 @@
+
+(session velocomputer.ses
+  (base_design velocomputer.dsn)
+  (placement
+    (resolution um 10)
+    (component Capacitors_SMD:C_1206_HandSoldering
+      (place C1 952500 -698500 front 0)
+      (place C2 952500 -749300 front 0)
+      (place C4 850900 -850900 front 0)
+      (place C5 850900 -800100 front 0)
+    )
+    (component mylib:CP_Radial_D5.0mm_P2.50mm
+      (place C3 838200 -685800 front 0)
+    )
+    (component mylib:Wire_Pad_1pin
+      (place J1 635000 -685800 front 0)
+      (place J2 635000 -838200 front 0)
+      (place J3 1016000 -838200 front 0)
+      (place J4 1016000 -685800 front 0)
+    )
+    (component mylib:INDUCTOR_V
+      (place L1 762000 -685800 front 0)
+    )
+    (component Resistors_SMD:R_1206_HandSoldering
+      (place R1 723900 -762000 front 0)
+      (place R2 952500 -800100 front 0)
+      (place R3 952500 -850900 front 0)
+    )
+    (component "w_smd_dil:psop-8"
+      (place U1 736600 -825500 front 270)
+    )
+  )
+  (was_is
+  )
+  (routes 
+    (resolution um 10)
+    (parser
+      (host_cad "KiCad's Pcbnew")
+      (host_version "4.0.5+dfsg1-4")
+    )
+    (library_out 
+      (padstack "Via[0-1]_1500:500_um"
+        (shape
+          (circle F.Cu 15000 0 0)
+        )
+        (shape
+          (circle B.Cu 15000 0 0)
+        )
+        (attach off)
+      )
+    )
+    (network_out 
+      (net "Net-(C1-Pad1)"
+        (wire
+          (path F.Cu 8000
+            932500 -698500
+            932500 -715503
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            809150 -777050
+            870697 -715503
+            932500 -715503
+          )
+        )
+        (via "Via[0-1]_1500:500_um" 809150 -777050
+        )
+        (wire
+          (path B.Cu 8000
+            805449 -839723
+            805449 -780751
+            809150 -777050
+          )
+        )
+        (via "Via[0-1]_1500:500_um" 805449 -839723
+        )
+        (wire
+          (path F.Cu 8000
+            764540 -832154
+            797880 -832154
+            805449 -839723
+          )
+        )
+        (wire
+          (path F.Cu 5992
+            764540 -832154
+            764540 -831850
+          )
+        )
+      )
+      (net "Net-(C1-Pad2)"
+        (wire
+          (path F.Cu 8000
+            972500 -698500
+            972500 -715503
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            932500 -749300
+            932500 -732297
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            932500 -732297
+            955706 -732297
+            972500 -715503
+          )
+        )
+      )
+      (net "Net-(C3-Pad1)"
+        (wire
+          (path F.Cu 8000
+            838200 -685800
+            819197 -685800
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            819197 -685800
+            800194 -666797
+            774606 -666797
+            755603 -685800
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            736600 -685800
+            755603 -685800
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            1016000 -685800
+            996572 -666372
+            857628 -666372
+            838200 -685800
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            1016000 -685800
+            1016000 -736721
+            970124 -782597
+            932500 -782597
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            932500 -800100
+            932500 -782597
+          )
+        )
+      )
+      (net VDD
+        (wire
+          (path F.Cu 8000
+            635000 -685800
+            703833 -685800
+            762904 -744871
+            762904 -774458
+            757859 -779503
+            703900 -779503
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            708660 -819150
+            689662 -819150
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            703900 -762000
+            703900 -779503
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            703900 -779503
+            689662 -793741
+            689662 -819150
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            708660 -831850
+            708660 -819150
+          )
+        )
+      )
+      (net "Net-(R1-Pad2)"
+        (wire
+          (path F.Cu 8000
+            743900 -762000
+            743900 -744497
+          )
+        )
+        (wire
+          (path F.Cu 5992
+            708356 -844854
+            708660 -844550
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            743900 -744497
+            689771 -744497
+            676458 -757810
+            676458 -825512
+            695800 -844854
+            708356 -844854
+          )
+        )
+      )
+      (net "Net-(R2-Pad2)"
+        (wire
+          (path F.Cu 8000
+            932500 -850900
+            913497 -850900
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            932500 -850900
+            932500 -833397
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            932500 -833397
+            956706 -833397
+            972500 -817603
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            913497 -850900
+            896490 -867907
+            782948 -867907
+            764540 -849499
+          )
+        )
+        (wire
+          (path F.Cu 5992
+            764540 -849499
+            764540 -844550
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            972500 -800100
+            972500 -817603
+          )
+        )
+      )
+      (net "Net-(C4-Pad1)"
+        (wire
+          (path F.Cu 8000
+            830900 -850900
+            830900 -833897
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            764540 -819150
+            816153 -819150
+            830900 -833897
+          )
+        )
+      )
+      (net "Net-(C4-Pad2)"
+        (wire
+          (path F.Cu 8000
+            870900 -850900
+            870900 -833897
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            830900 -800100
+            864697 -833897
+            870900 -833897
+          )
+        )
+      )
+      (net "Net-(C5-Pad2)"
+        (wire
+          (path F.Cu 8000
+            870508 -777050
+            870900 -777442
+            870900 -800100
+          )
+        )
+        (via "Via[0-1]_1500:500_um" 870508 -777050
+        )
+        (wire
+          (path B.Cu 8000
+            787400 -685800
+            870508 -768908
+            870508 -777050
+          )
+        )
+        (wire
+          (path F.Cu 5992
+            764540 -802364
+            764540 -806450
+          )
+        )
+        (wire
+          (path F.Cu 8000
+            787400 -685800
+            787400 -779504
+            764540 -802364
+          )
+        )
+      )
+    )
+  )
+)
\ No newline at end of file