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(pcb "/home/pro/Рабочий стол/kicad/velocomputer/velocomputer.dsn"
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(parser
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(string_quote ")
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(space_in_quoted_tokens on)
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(host_cad "KiCad's Pcbnew")
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(host_version "4.0.5+dfsg1-4")
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)
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(resolution um 10)
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(unit um)
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(structure
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(layer F.Cu
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(type signal)
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(property
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(index 0)
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)
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)
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(layer B.Cu
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(type signal)
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(property
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(index 1)
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)
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)
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(boundary
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(path pcb 0 132080 -102870 191770 -102870 191770 -68580 132080 -68580
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132080 -102870 132080 -102870)
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)
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(plane GND (polygon F.Cu 0 161290 -69850 161290 -80010 162560 -81280 175260 -81280
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176530 -80010 176530 -69850 177800 -68580 191770 -68580 191770 -102870
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132080 -102870 132080 -68580 160020 -68580))
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(keepout "" (polygon F.Cu 0 157480 -83693 160020 -83693 160020 -89027 157480 -89027))
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(keepout "" (polygon F.Cu 0 172085 -80391 165735 -80391 165735 -69342 172085 -69342))
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(via "Via[0-1]_1500:500_um")
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(rule
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(width 800)
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(clearance 508.1)
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(clearance 508.1 (type default_smd))
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(clearance 127 (type smd_smd))
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)
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)
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(placement
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(component Capacitors_SMD:C_1206
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(place C1 177800 -92710 front 0 (PN 1u))
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(place C2 168910 -86360 front 90 (PN 0.01u))
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(place C3 175260 -86360 front 90 (PN 0.1u))
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(place C4 170180 -92710 front 0 (PN 3300p))
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(place C5 181610 -86360 front 270 (PN 22u))
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)
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(component Diodes_SMD:D_1206
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(place D1 170180 -97790 front 180 (PN D))
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)
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(component custom:1pin
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(place J1 135890 -78740 front 0 (PN VDD))
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(place J2 135890 -95250 front 0 (PN GND))
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(place J3 185420 -95250 front 0 (PN GND))
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(place J4 185420 -78740 front 0 (PN +5V))
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)
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(component Inductors_SMD:L_Fastron_PISN
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(place L1 168910 -74930 front 180 (PN 220u))
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)
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(component Resistors_SMD:R_1206
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(place R1 148590 -83820 front 180 (PN 430K))
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(place R2 148590 -88900 front 180 (PN 47K))
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(place R4 162560 -92710 front 0 (PN 47K))
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(place R5 154940 -97790 front 180 (PN 470K))
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(place R6 154940 -92710 front 180 (PN 150K))
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)
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(component Resistors_SMD:R_2512
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(place R3 142240 -86360 front 270 (PN 510K))
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)
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(component "w_smd_dil:so-8"
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(place U1 158750 -86360 front 270 (PN LM5017MR))
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)
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)
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(library
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(image Capacitors_SMD:C_1206
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(outline (path signal 100 -1600 -800 -1600 800))
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(outline (path signal 100 1600 -800 -1600 -800))
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(outline (path signal 100 1600 800 1600 -800))
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(outline (path signal 100 -1600 800 1600 800))
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(outline (path signal 120 1000 1020 -1000 1020))
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(outline (path signal 120 -1000 -1020 1000 -1020))
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(outline (path signal 50 -2250 1050 2250 1050))
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(outline (path signal 50 -2250 1050 -2250 -1050))
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(outline (path signal 50 2250 -1050 2250 1050))
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(outline (path signal 50 2250 -1050 -2250 -1050))
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(pin Rect[T]Pad_1000x1600_um 1 -1500 0)
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(pin Rect[T]Pad_1000x1600_um 2 1500 0)
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)
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(image Diodes_SMD:D_1206
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(outline (path signal 100 -254 254 -254 -254))
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(outline (path signal 100 127 0 381 0))
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(outline (path signal 100 -254 0 -508 0))
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(outline (path signal 100 127 -254 -254 0))
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(outline (path signal 100 127 254 127 -254))
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(outline (path signal 100 -254 0 127 254))
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(outline (path signal 120 -2200 1060 -2200 -1060))
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(outline (path signal 100 -1700 -950 -1700 950))
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(outline (path signal 100 1700 -950 -1700 -950))
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(outline (path signal 100 1700 950 1700 -950))
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(outline (path signal 100 -1700 950 1700 950))
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(outline (path signal 50 -2300 1160 2300 1160))
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(outline (path signal 50 -2300 -1160 2300 -1160))
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(outline (path signal 50 -2300 1160 -2300 -1160))
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(outline (path signal 50 2300 1160 2300 -1160))
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(outline (path signal 120 1000 1060 -2200 1060))
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(outline (path signal 120 -2200 -1060 1000 -1060))
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(pin Rect[T]Pad_1000x1600_um 1 -1500 0)
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(pin Rect[T]Pad_1000x1600_um 2 1500 0)
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)
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(image custom:1pin
|
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(pin Round[A]Pad_1524_um 1 0 0)
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)
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(image Inductors_SMD:L_Fastron_PISN
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(outline (path signal 50 -7000 -2500 -7000 2500))
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(outline (path signal 50 -7000 2500 -1250 5500))
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(outline (path signal 50 -1250 5500 1250 5500))
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(outline (path signal 50 1250 5500 7000 2500))
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(outline (path signal 50 7000 2500 7000 -2250))
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(outline (path signal 50 7000 -2250 7000 -2500))
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(outline (path signal 50 7000 -2500 1250 -5500))
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(outline (path signal 50 1250 -5500 -1250 -5500))
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(outline (path signal 50 -1250 -5500 -7000 -2500))
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(outline (path signal 100 -6400 2000 -6400 -2200))
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(outline (path signal 100 -6400 -2200 -1300 -5000))
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(outline (path signal 100 -1300 -5000 1300 -5000))
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(outline (path signal 100 1300 -5000 6500 -2300))
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(outline (path signal 100 6500 -2300 6500 2200))
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(outline (path signal 100 -6400 2000 -6400 2300))
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(outline (path signal 100 -6400 2300 -1300 5000))
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(outline (path signal 100 -1300 5000 1300 5000))
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(outline (path signal 100 1300 5000 6500 2300))
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(outline (path signal 100 6500 2300 6500 2000))
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(outline (path signal 380 -20 260 -20 -250))
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(outline (path signal 120 -1290 5090 1250 5090))
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(outline (path signal 120 -1290 -5070 1250 -5070))
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(outline (path signal 120 1250 -5070 6590 -2280))
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(outline (path signal 120 6590 -2280 6590 -2030))
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(outline (path signal 120 -1290 -5070 -6490 -2280))
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(outline (path signal 120 -6490 -2280 -6490 -2030))
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(outline (path signal 120 1250 5090 6590 2290))
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(outline (path signal 120 6590 2290 6590 2040))
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(outline (path signal 120 -6490 2290 -6490 2040))
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(outline (path signal 120 -1290 5090 -6490 2290))
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(outline (path signal 100 4300 0 4089.54 -1328.77 3478.77 -2527.48 2527.48 -3478.77
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1328.77 -4089.54 0 -4300 -1328.77 -4089.54 -2527.48 -3478.77
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-3478.77 -2527.48 -4089.54 -1328.77 -4300 0 -4089.54 1328.77
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-3478.77 2527.48 -2527.48 3478.77 -1328.77 4089.54 0 4300
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1328.77 4089.54 2527.48 3478.77 3478.77 2527.48 4089.54 1328.77))
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(outline (path signal 380 1032.62 10 981.097 -315.276 831.584 -608.712 598.712 -841.584
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305.276 -991.097 -20 -1042.62 -345.276 -991.097 -638.712 -841.584
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-871.584 -608.712 -1021.1 -315.276 -1072.62 10 -1021.1 335.276
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-871.584 628.712 -638.712 861.584 -345.276 1011.1 -20 1062.62
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305.276 1011.1 598.712 861.584 831.584 628.712 981.097 335.276))
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(outline (path signal 380 792.712 10 752.935 -241.142 637.497 -467.7 457.7 -647.497
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231.142 -762.935 -20 -802.712 -271.142 -762.935 -497.7 -647.497
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-677.497 -467.7 -792.935 -241.142 -832.712 10 -792.935 261.142
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-677.497 487.7 -497.7 667.497 -271.142 782.935 -20 822.712
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231.142 782.935 457.7 667.497 637.497 487.7 752.935 261.142))
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(outline (path signal 380 490 10 465.039 -147.599 392.599 -289.77 279.77 -402.599
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137.599 -475.039 -20 -500 -177.599 -475.039 -319.77 -402.599
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-432.599 -289.77 -505.039 -147.599 -530 10 -505.039 167.599
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-432.599 309.77 -319.77 422.599 -177.599 495.039 -20 520
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137.599 495.039 279.77 422.599 392.599 309.77 465.039 167.599))
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(outline (path signal 380 240 10 227.275 -70.344 190.344 -142.824 132.824 -200.344
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60.344 -237.275 -20 -250 -100.344 -237.275 -172.824 -200.344
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-230.344 -142.824 -267.275 -70.344 -280 10 -267.275 90.344
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-230.344 162.824 -172.824 220.344 -100.344 257.275 -20 270
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60.344 257.275 132.824 220.344 190.344 162.824 227.275 90.344))
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(pin Rect[T]Pad_3000x3000_um 2 -5170 -10)
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(pin Rect[T]Pad_3000x3000_um 1 5170 10)
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)
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(image Resistors_SMD:R_1206
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(outline (path signal 100 -1600 -800 -1600 800))
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(outline (path signal 100 1600 -800 -1600 -800))
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(outline (path signal 100 1600 800 1600 -800))
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(outline (path signal 100 -1600 800 1600 800))
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(outline (path signal 120 1000 -1070 -1000 -1070))
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(outline (path signal 120 -1000 1070 1000 1070))
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(outline (path signal 50 -2150 1110 2150 1110))
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(outline (path signal 50 -2150 1110 -2150 -1100))
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(outline (path signal 50 2150 -1100 2150 1110))
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(outline (path signal 50 2150 -1100 -2150 -1100))
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(pin Rect[T]Pad_900x1700_um 1 -1450 0)
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(pin Rect[T]Pad_900x1700_um 2 1450 0)
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)
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(image Resistors_SMD:R_2512
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(outline (path signal 100 -3150 -1600 -3150 1600))
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(outline (path signal 100 3150 -1600 -3150 -1600))
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(outline (path signal 100 3150 1600 3150 -1600))
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(outline (path signal 100 -3150 1600 3150 1600))
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(outline (path signal 120 2600 -1820 -2600 -1820))
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(outline (path signal 120 -2600 1820 2600 1820))
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(outline (path signal 50 -3850 1850 3850 1850))
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(outline (path signal 50 -3850 1850 -3850 -1850))
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(outline (path signal 50 3850 -1850 3850 1850))
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(outline (path signal 50 3850 -1850 -3850 -1850))
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(pin Rect[T]Pad_1000x3200_um 1 -3100 0)
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(pin Rect[T]Pad_1000x3200_um 2 3100 0)
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)
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(image "w_smd_dil:so-8"
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(outline (path signal 127 -2413 1981.2 -2413 -1981.2))
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(outline (path signal 127 -2413 -1981.2 2413 -1981.2))
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(outline (path signal 127 2413 -1981.2 2413 1981.2))
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(outline (path signal 127 2413 1981.2 -2413 1981.2))
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(outline (path signal 127 -1905 1981.2 -1905 3073.4))
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(outline (path signal 127 -635 1981.2 -635 3073.4))
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(outline (path signal 127 635 1981.2 635 3073.4))
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(outline (path signal 127 1905 3073.4 1905 1981.2))
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(outline (path signal 127 1905 -1981.2 1905 -3073.4))
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(outline (path signal 127 635 -3073.4 635 -1981.2))
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(outline (path signal 127 -635 -3073.4 -635 -1981.2))
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(outline (path signal 127 -1905 -3073.4 -1905 -1981.2))
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(outline (path signal 127 -1203.93 -1244.6 -1227.06 -1390.6 -1294.17 -1522.31
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-1398.69 -1626.83 -1530.4 -1693.94 -1676.4 -1717.07 -1822.4 -1693.94
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-1954.11 -1626.83 -2058.63 -1522.31 -2125.74 -1390.6 -2148.87 -1244.6
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-2125.74 -1098.6 -2058.63 -966.891 -1954.11 -862.366 -1822.4 -795.257
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-1676.4 -772.133 -1530.4 -795.257 -1398.69 -862.366 -1294.17 -966.891
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-1227.06 -1098.6))
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(pin Rect[T]Pad_599.44x1998.98_um 1 -1905 -2794)
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(pin Rect[T]Pad_599.44x1998.98_um 2 -635 -2794)
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(pin Rect[T]Pad_599.44x1998.98_um 3 635 -2794)
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(pin Rect[T]Pad_599.44x1998.98_um 4 1905 -2794)
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(pin Rect[T]Pad_599.44x1998.98_um 5 1905 2794)
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(pin Rect[T]Pad_599.44x1998.98_um 6 635 2794)
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(pin Rect[T]Pad_599.44x1998.98_um 7 -635 2794)
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(pin Rect[T]Pad_599.44x1998.98_um 8 -1905 2794)
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)
|
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(padstack Round[A]Pad_1524_um
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|
|
(shape (circle F.Cu 1524))
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|
(shape (circle B.Cu 1524))
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(attach off)
|
|
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)
|
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(padstack Rect[T]Pad_3000x3000_um
|
|
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|
|
(shape (rect F.Cu -1500 -1500 1500 1500))
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(attach off)
|
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)
|
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|
(padstack Rect[T]Pad_599.44x1998.98_um
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|
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|
|
(shape (rect F.Cu -299.72 -999.49 299.72 999.49))
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|
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(attach off)
|
|
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)
|
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(padstack Rect[T]Pad_900x1700_um
|
|
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|
|
(shape (rect F.Cu -450 -850 450 850))
|
|
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(attach off)
|
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)
|
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(padstack Rect[T]Pad_1000x3200_um
|
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|
|
(shape (rect F.Cu -500 -1600 500 1600))
|
|
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|
(attach off)
|
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)
|
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(padstack Rect[T]Pad_1000x1600_um
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(shape (rect F.Cu -500 -800 500 800))
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(attach off)
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)
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(padstack "Via[0-1]_1500:500_um"
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(shape (circle F.Cu 1500))
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(shape (circle B.Cu 1500))
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(attach off)
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)
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)
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(network
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(net "Net-(C1-Pad1)"
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(pins C1-1 D1-1 U1-6)
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)
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(net GND
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(pins C1-2 C5-2 J2-1 J3-1 R2-2 R6-2 U1-1)
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)
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(net "Net-(C3-Pad1)"
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(pins C3-1 C4-1 R4-2)
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)
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(net VDD
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(pins J1-1 R1-1 R3-1 U1-2)
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)
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(net "Net-(R1-Pad2)"
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(pins R1-2 R2-1 U1-3)
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)
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(net "Net-(C4-Pad2)"
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(pins C4-2 C5-1 D1-2 J4-1 L1-2 R5-1)
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)
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(net "Net-(C2-Pad1)"
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(pins C2-1 U1-7)
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)
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(net "Net-(C2-Pad2)"
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(pins C2-2 L1-1 R4-1 U1-8)
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)
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(net "Net-(C3-Pad2)"
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(pins C3-2 R5-2 R6-1 U1-5)
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)
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(net "Net-(R3-Pad2)"
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(pins R3-2 U1-4)
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)
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(class kicad_default "" GND "Net-(C1-Pad1)" "Net-(C1-Pad2)" "Net-(C2-Pad1)"
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"Net-(C2-Pad2)" "Net-(C3-Pad1)" "Net-(C3-Pad2)" "Net-(C4-Pad1)" "Net-(C4-Pad2)"
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"Net-(C5-Pad2)" "Net-(R1-Pad2)" "Net-(R2-Pad2)" "Net-(R3-Pad2)" VDD
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(circuit
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(use_via Via[0-1]_1500:500_um)
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)
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(rule
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(width 800)
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(clearance 508.1)
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)
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)
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)
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(wiring
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)
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)
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